Spark Logic

24C08 EEPROM (24LC08B) connection guide

24C08 EEPROM (24LC08B) TDFN-8 wiring guide with power, signal assignments, and bench checks.

PDIP-8 8 contacts
SOIC-8 8 contacts
MSOP-8 8 contacts
TSSOP-8 8 contacts
DFN-8 9 contacts

TDFN-8

9 contacts Current package
SOT-23-5 5 contacts

Microchip Technology · 2 × 3 × 0.8 mm leadless body · 0.50 mm pitch · Microchip package code /MNY

Power and bypass

Required

Connect the EEPROM and a 3.3 V I²C host to a regulated 3.3 V rail with a shared ground. Fit a 100 nF ceramic capacitor directly across the EEPROM supply pins. Finish the signal connections before applying power.

C1 100 nF ceramic between 3.3 V and Ground3.3 VC1 100 nF ceramicGround

Bench checks

  • Measure about 3.3 V from VCC to VSS at the package.
  • The underside exposed pad can be tied to VSS or left electrically floating. The numbered VSS terminal remains the supply return.

Microchip DS20001710M · §1 and §2. Microchip AN1028 · Figure 1.

Connection scenarios

Read and write over I²C

With power off, tie WP to ground. Use a scratch address in the allowed range before testing writes on an installed device.

Fit C1 as shown in Power and bypass. Connect both open-drain host lines and start at 100 kHz.

Use 7-bit address 0x50 + (offset >> 8), then send the low byte of the offset.

B1:B0 select one of four 256-byte blocks. The chip ignores the next higher address bit, so 0x54–0x57 mirror 0x50–0x53.

I²C wiring with separate pull-ups on SDA and SCL and WP tied low3.3 VR14.7 kΩR24.7 kΩSDASCLHostEEPROMVCCVSSWPCommon ground

Bench checks

  • For a short bus, use R1 and R2 of 4.7 kΩ each and count any host-board pull-ups in parallel. At 100 pF the estimated 30–70% rise time is 0.40 µs and LOW current is about 0.62 mA at 0.4 V. Measure SDA and SCL rise time against the 1 µs Standard-mode limit before changing speed or adding wiring.
  • Read a selected byte by sending the client address with write direction, then the memory address, then a repeated START and the client address with read direction. End a one-byte read with NACK and STOP.
  • Send STOP to start programming, then use acknowledge polling with a bounded timeout. The maximum specified cycle is 5 ms. Read back the scratch byte to verify the write.
  • Split page writes at every 16-byte boundary. A write that crosses a boundary wraps inside the current page.

Microchip DS20001710M · §§5–8. Microchip AN1028 · Figure 1 and pull-up calculation.

TDFN-8 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Top view · Locate pin 1 using the package index mark.
EP is the exposed center pad on the underside.
Selected pin details

4 · VSS

Reference · Ground

Supply return and signal reference. Connect to the host ground.

DS20001710M · §2 and Table 2-1

Electrical limits · Pin in the reference

Models and documents

This reference covers the standard package codes listed for Microchip 24LC08B in the linked datasheet. Match the full manufacturer part number before wiring a device marked 24C08. Use its own datasheet for other manufacturers or the Microchip AA and FC versions. The four-ball CSP drawing in the family datasheet applies to 24AA08.

24LC08B
The /MNY package suffix selects this outline. Check the ordering table for supported temperature and reel combinations.