Spark Logic

24C512 EEPROM (24LC512) connection guide

24C512 EEPROM (24LC512) TSSOP-8 wiring guide with power, signal assignments, and bench checks.

PDIP-8 8 contacts
SOIC-8 8 contacts
SOIJ-8 8 contacts

TSSOP-8

8 contacts Current package
TSSOP-14 14 contacts
DFN-S-8 9 contacts

Microchip Technology · Standard pin assignment · 0.65 mm lead pitch · Microchip package code /ST

Power and bypass

Required

Connect the EEPROM and a 3.3 V I²C host to a regulated 3.3 V rail with a shared ground. Fit a 100 nF ceramic capacitor directly across the EEPROM supply pins. Finish the signal connections before applying power.

C1 100 nF ceramic between 3.3 V and Ground3.3 VC1 100 nF ceramicGround

Bench checks

  • Measure about 3.3 V from VCC to VSS at the package.

Microchip DS20001754R · §1 and §2. Microchip AN1028 · Figure 1.

Connection scenarios

Read and write over I²C

With power off, tie WP to ground. Use a scratch address in the allowed range before testing writes on an installed device.

Fit C1 as shown in Power and bypass. Connect both open-drain host lines and start at 100 kHz. Tie A0, A1 and A2 to ground for this example.

The 7-bit client address is 0x50 + 4×A2 + 2×A1 + A0. Strap each pin to VSS or VCC before power-up.

Send two memory-address bytes, high byte first. The usable offset ends at 0xFFFF.

I²C wiring with separate pull-ups on SDA and SCL and WP tied low3.3 VR14.7 kΩR24.7 kΩSDASCLHostEEPROMVCCVSSWPCommon groundA0–A2

Bench checks

  • For a short bus, use R1 and R2 of 4.7 kΩ each and count any host-board pull-ups in parallel. At 100 pF the estimated 30–70% rise time is 0.40 µs and LOW current is about 0.62 mA at 0.4 V. Measure SDA and SCL rise time against the 1 µs Standard-mode limit before changing speed or adding wiring.
  • Read a selected byte by sending the client address with write direction, then the memory address, then a repeated START and the client address with read direction. End a one-byte read with NACK and STOP.
  • Send STOP to start programming, then use acknowledge polling with a bounded timeout. The maximum specified cycle is 5 ms. Read back the scratch byte to verify the write.
  • Split page writes at every 128-byte boundary. A write that crosses a boundary wraps inside the current page.

Microchip DS20001754R · §§5–8. Microchip AN1028 · Figure 1 and pull-up calculation.

TSSOP-8 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Top view · Locate pin 1 using the package index mark.
Selected pin details

2 · A1

Input · Address

Chip select bit 1. Strap to VSS for 0 or to VCC for 1.

DS20001754R · §2 and Table 2-1

Electrical limits · Pin in the reference

Models and documents

This reference covers the standard package codes listed for Microchip 24LC512 in the linked datasheet. Match the full manufacturer part number before wiring a device marked 24C512. Use its own datasheet for other manufacturers or the Microchip AA and FC versions. The eight-ball CSP is listed for 24AA512. The five-lead SOT-23 and 8-lead UDFN are listed for 24FC512.

24LC512
The /ST package suffix selects this outline. Check the ordering table for supported temperature and reel combinations.