Motorola MC6809E connection guide

Motorola MC6809E MC6809E DIP-40 wiring guide with power, signal assignments, and bench checks.

MC6809E DIP-40

40 contacts Current package

Motorola · Motorola P plastic (Case 711), S CERDIP (Case 734) and L ceramic (Case 715) share this top-view 40-pin assignment. External E and Q clocks.

2.0 MHz maximum bus rate. MC68B09EP/S/L (0–70 °C) and MC68B09ECP/CS/CL (−40 to +85 °C).

5 V supply and bypass

Required

Apply regulated 5 V and fit a 100 nF ceramic bypass with short connections to the supply rails.

+5 V
- 5 V supply +
- VCC (7)
- C1.1
0 V
- 5 V supply −
- VSS (1)
- C1.2

Bench checks

Verify pin 1 is grounded and measure 4.75–5.25 V at pin 7.
Keep RESET asserted during supply and clock startup. The bypass capacitor is a board-level design choice.

Motorola MC6809E datasheet DS9846-R2, pin assignment and DC characteristics

Connection scenarios

External E/Q and reset

Drive E and Q from a common two-channel 5 V-capable clock source. For the base speed grade, set both to 1 MHz, nominal 50% duty cycle, with Q leading E by one quarter cycle.

Reference
- VSS (1)
- Clock driver GND
- Reset driver GND
- TSC (39)
E phase
- Clock driver E OUT
- E (34)
Q phase
- Clock driver Q OUT
- Q (35)
Reset
- Reset driver OUT
- /RESET (37)
Run and interrupt idle

Bench checks

At the base grade verify each relevant quarter-cycle separation is at least 200 ns, E high and low and Q high are each at least 450 ns, and edge times are at most 25 ns.
Hold RESET low for more than one complete bus cycle and through clock start-up. Verify its released voltage is at least 4.0 V.
Check that the boot ROM supplies the entry address high byte at 0xFFFE and low byte at 0xFFFF.

Motorola MC6809E datasheet DS9846-R2, bus timing and Fig. 6

MC6809E DIP-40 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Top view · Pin 1 at upper left · Schematic outline

Selected pin details

35 · Q

Input · Clock inputs / oscillator

Externally driven quadrature timing input. Q must lead E. Check both phase spacings and input levels at the pins.

Motorola MC6809E datasheet DS9846-R2, pin assignment and pin descriptions

Electrical limits · Pin in the reference

Models and documents

Covers the Motorola MC6809 and MC6809E plus their A and B speed grades. On the MC6809, E and Q are outputs. On the MC6809E, both are inputs, and pins 33, 36, 38 and 39 also differ. Hitachi HD6309 and later CMOS versions require their own datasheets.

MC6809E: 1.0 MHz maximum bus rate. MC6809EP/S/L (0–70 °C) and MC6809ECP/CS/CL (−40 to +85 °C).
MC68A09E: 1.5 MHz maximum bus rate. MC68A09EP/S/L (0–70 °C) and MC68A09ECP/CS/CL (−40 to +85 °C).
MC68B09E: 2.0 MHz maximum bus rate. MC68B09EP/S/L (0–70 °C) and MC68B09ECP/CS/CL (−40 to +85 °C).

Motorola MC6809 datasheet DS9845-R2· Manufacturer scan, © 1983. Pin map p. 1, electrical and bus timing pp. 2–3, crystal and reset pp. 7–8, ordering p. 35. Scan SHA-256 87037123596de83bbc44ac63fbcde3950d368d5ee30880bffaa54e23bb81ea68.
Motorola MC6809E datasheet DS9846-R2· Manufacturer scan, © 1984. Check the pin assignment, external clock thresholds and timing, TSC timing and ordering table. Scan SHA-256 42c50598f2184bc37535a8d59be60a895c14e34919d706317b18f02f73441808.
Motorola MC6809–MC6809E Microprocessor Programming Manual· Programming model, interrupt handling and vectors. Appendix B lists the two pin assignments side by side.