APW8805 / APW8805A / APW8805B buck converter connection guide

APW8805 / APW8805A / APW8805B buck converter (TDFN 3 × 3 mm (QB)) connection guide. Build the 1.05 V buck circuit. Check enable and power good.

TDFN 3 × 3 mm (QB)

11 contacts Current package

ANPEC Electronics · Ten perimeter leads and one exposed ground pad.

Build the 1.05 V buck circuit

Required

With power off, join VIN and VCC to the same 2.6–6 V rail. Join both SW pins, keep that copper compact, and leave NC open. Drive EN low during initial power-up. The optional feed-forward capacitor across R1 is omitted in this drawing.

Input
- CIN.1
- RPG.1
- Input supply positive
Ground
- CIN.2
- COUT1.2
- COUT2.2
- R2.2
- Input return
Enable
- →
- Enable control
Switch node
- →
- →
- L1.1
Output
- L1.2
- R1.1
- COUT1.1
- COUT2.1
- Load positive
Feedback
- →
- R1.2
- R2.1
Power good
- →
- RPG.2
- Power-good monitor

Bench checks

Verify continuity from pins 4, 5 and the exposed pad to ground. Check VIN for shorts before applying a current-limited supply.
Drive EN high after the input has settled. The divider sets 0.8 × (1 + 4.7/15) ≈ 1.05 V nominal. Check at the output capacitor.
Choose L1 for the peak inductor current, and check capacitor effective capacitance under bias, ripple and PCB temperature before increasing load.

ANPEC APW8805 Rev. A.4, Typical Application Circuit, p. 10

Connection scenarios

Check enable and power good

Use the same regulator circuit. The 100 kΩ pull-up makes POK rise to the input rail; check the monitor input rating before connecting it.

Input
- CIN.1
- RPG.1
- Input supply positive
Ground
- CIN.2
- COUT1.2
- COUT2.2
- R2.2
- Input return
Enable
- →
- Enable control
Switch node
- →
- →
- L1.1
Output
- L1.2
- R1.1
- COUT1.1
- COUT2.1
- Load positive
Feedback
- →
- R1.2
- R2.1
Power good
- →
- RPG.2
- Power-good monitor

Bench checks

With EN low, verify POK is low. With EN high, monitor POK as VOUT settles.
A low POK is a status indication. Check VIN, VCC, EN and VOUT to distinguish startup from a fault.

ANPEC APW8805 Rev. A.4, Pin Description and Function Description

TDFN 3 × 3 mm (QB) wiring map

External wiring example · Check enable and power good

Highlighted contacts are used in the required step or selected circuit. Select a contact to highlight its wiring nets.

Choose a pin

TDFN 3 × 3 mm (QB) · Top view, with pin 1 at upper left. The exposed ground pad is on the underside.
Dashed outline shows the underside pad schematically. See the package drawing for the footprint.

Selected pin details

1 · FB

Input · Inputs

Divider midpoint. Sense the filtered output here; the nominal regulated feedback voltage is 0.8 V.

ANPEC APW8805 / A / B datasheets, p. 2 and Pin Description

Electrical limits · Pin in the reference

Models and documents

Choose the exact suffix for the enable thresholds and light-load behavior. The APW8805B overview lists 0.6 V as a minimum output, while its feedback specification and application equation use 0.8 V. The circuit here uses the documented 0.8 V reference.

APW8805: Automatic PFM/PWM. Order code: APW8805QBI-TRG.
APW8805A: Forced PWM. Order code: APW8805AQBI-TRG.
APW8805B: Automatic PFM/PWM; documented startup into a pre-biased output. Order code: APW8805BQBI-TRG.

Datasheet for APW8805· Rev. A.4; pin configuration, operating limits and typical application.
Datasheet for APW8805A· Rev. A.4; pin configuration, operating limits and typical application.
Datasheet for APW8805B· Rev. A.2; pin configuration, operating limits and typical application.
Source register· Original document URLs, revisions and file checksums.