ATmega1284 / ATmega1284P / ATmega644 / ATmega32 pinout

Package pin assignments for ATmega1284, ATmega1284P, ATmega644, ATmega32, with peripheral signals, clock grades and a serial programming guide.

TQFP-44

44 contacts Current package

PDIP-40 40 contacts

QFN-44 45 contacts

Microchip Technology · 44 numbered contacts. See the individual package drawings for footprint dimensions.

32 KiB flash · 2 KiB SRAM · 1 KiB EEPROM · 4.5–5.5 V · 16 MHz maximum · -40 to +85 °C

TQFP-44 pinout

TQFP-44

Top view · Pin 1 at the upper left · Schematic outline Scroll the map to reach all contacts.

Selected pin details

34 · PA3

Bidirectional · GPIO

General-purpose digital I/O. Alternate assignments: ADC3 (ADC).

After reset · GPIO driver is high impedance during reset. Clock, debug, and alternate-function use depend on fuse and peripheral configuration.

2503Q · Pinout and peripheral signal descriptions

Electrical limits · Link to this pin

All 44 pins

Pin	Signal	Direction	Function
1	PB5 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: MOSI (SPI).
2	PB6 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: MISO (SPI).
3	PB7 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: SCK (SPI).
4	RESET Input	Input	Active-low reset input. The in-system programmer uses this pin to enter serial programming mode.
5	VCC Supply	Supply	Digital supply. Connect every VCC pin and place a local 100 nF ceramic bypass close to each VCC-to-ground pair.
6	GND Return	Return	Supply return. Connect every ground pin.
7	XTAL2 Output	Output	Oscillator amplifier output. Follow the selected clock mode before attaching a circuit.
8	XTAL1 Input	Input	Oscillator amplifier input or external clock input, depending on clock fuses.
9	PD0 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: RXD (USART).
10	PD1 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TXD (USART).
11	PD2 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: INT0 (EXINT).
12	PD3 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: INT1 (EXINT).
13	PD4 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: OCB (TC1).
14	PD5 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: OCA (TC1).
15	PD6 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ICP (TC1).
16	PD7 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: OC (TC2).
17	VCC Supply	Supply	Digital supply. Connect every VCC pin and place a local 100 nF ceramic bypass close to each VCC-to-ground pair.
18	GND Return	Return	Supply return. Connect every ground pin.
19	PC0 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: SCL (TWI).
20	PC1 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: SDA (TWI).
21	PC2 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TCK (JTAG).
22	PC3 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TMS (JTAG).
23	PC4 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TDO (JTAG).
24	PC5 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TDI (JTAG).
25	PC6 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TOSC1 (TC2).
26	PC7 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: TOSC2 (TC2).
27	AVCC Supply	Supply	Analog supply. Connect it to the supply even if analog conversion is unused. Follow the data sheet’s filtering guidance for precision conversion.
28	GND Return	Return	Supply return. Connect every ground pin.
29	AREF Analog reference	Analog reference	ADC voltage reference terminal. Check the reference selection before driving this pin from an external voltage.
30	PA7 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC7 (ADC).
31	PA6 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC6 (ADC).
32	PA5 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC5 (ADC).
33	PA4 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC4 (ADC).
34	PA3 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC3 (ADC).
35	PA2 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC2 (ADC).
36	PA1 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC1 (ADC).
37	PA0 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: ADC0 (ADC).
38	VCC Supply	Supply	Digital supply. Connect every VCC pin and place a local 100 nF ceramic bypass close to each VCC-to-ground pair.
39	GND Return	Return	Supply return. Connect every ground pin.
40	PB0 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: T (TC0), XCK (USART).
41	PB1 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: T (TC1).
42	PB2 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: INT2 (EXINT), AIN0 (AC).
43	PB3 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: OC (TC0), AIN1 (AC).
44	PB4 Bidirectional	Bidirectional	General-purpose digital I/O. Alternate assignments: SS (SPI).

Signal assignments

External interrupts

Review each signal assignment and the peripheral enable conditions in the data sheet. INT2 → PB2 · INT1 → PD3 · INT0 → PD2

Timer/Counter 0

Review each signal assignment and the peripheral enable conditions in the data sheet. OC → PB3 · T → PB0

Timer/Counter 2

Review each signal assignment and the peripheral enable conditions in the data sheet. TOSC2 → PC7 · TOSC1 → PC6 · OC → PD7

Timer/Counter 1

Review each signal assignment and the peripheral enable conditions in the data sheet. T → PB1 · ICP → PD6 · OCA → PD5 · OCB → PD4

SPI peripheral

Use SCK, MOSI, MISO and a chip-select line. Firmware selects direction and clock phase. Check the separate ISP mapping when programming. SCK → PB7 · MISO → PB6 · MOSI → PB5 · SS → PB4

USART · Serial

Use TXD and RXD for asynchronous serial. XCK is for synchronous mode. The signal levels follow the microcontroller supply domain. XCK → PB0 · TXD → PD1 · RXD → PD0

Analog comparator

Review each signal assignment and the peripheral enable conditions in the data sheet. AIN1 → PB3 · AIN0 → PB2

Analog-to-digital converter

Select the analog channel and reference in firmware. The reference choice and supply constrain the input range. ADC7 → PA7 · ADC6 → PA6 · ADC5 → PA5 · ADC4 → PA4 · ADC3 → PA3 · ADC2 → PA2 · ADC1 → PA1 · ADC0 → PA0

TWI / I²C

Connect SDA and SCL to the bus with pull-ups to a voltage supported by all devices. Verify the pull-up value for the bus capacitance and rate. SDA → PC1 · SCL → PC0

JTAG

Check the JTAG fuse and enable state before using the pins for GPIO. JTAG uses TCK, TMS, TDI and TDO. TDI → PC5 · TDO → PC4 · TMS → PC3 · TCK → PC2

Electrical limits

Parameter	Limit	Conditions and source
Supply and clock grade4.5–5.5 V · 16 MHz maximum	4.5–5.5 V · 16 MHz maximum	Follow the speed-grade curve for the selected voltage. The headline clock figure is the maximum at its specified supply and temperature. 2503Q · Speed grades and ordering information
Ambient temperature grade-40 to +85 °C	-40 to +85 °C	For this order code. Verify silicon revision and errata in the current manufacturer documentation. 2503Q · Ordering information
Program flash32 KiB	32 KiB	Nonvolatile program memory. 2503Q · Memory
SRAM2 KiB	2 KiB	Volatile data and stack storage. 2503Q · Memory
EEPROM1 KiB	1 KiB	Nonvolatile data storage. 2503Q · Memory
Clock and supplyOrder-code dependent	Order-code dependent	Use the grade table and the device’s speed-versus-voltage curve. 2503Q · Electrical Characteristics

Models and documents

Each package lists the documented order codes and variants covered by this map. Select the marked model to see its peripheral assignments and memory. Check the exact order code and datasheet revision before laying out a PCB.

ATmega1284: 128 KiB flash · 16 KiB SRAM · 4 KiB EEPROM. Choose the marked order code for voltage, clock, and temperature.
ATmega1284-AU: 128 KiB flash · 16 KiB SRAM · 4 KiB EEPROM · 1.8–5.5 V · 20 MHz maximum · -40 to +85 °C
ATmega1284-AUR: 128 KiB flash · 16 KiB SRAM · 4 KiB EEPROM · 1.8–5.5 V · 20 MHz maximum · -40 to +85 °C
ATmega1284P: 128 KiB flash · 16 KiB SRAM · 4 KiB EEPROM. Choose the marked order code for voltage, clock, and temperature.
ATmega1284P-AU: 128 KiB flash · 16 KiB SRAM · 4 KiB EEPROM · 1.8–5.5 V · 20 MHz maximum · -40 to +85 °C
ATmega1284P-AUR: 128 KiB flash · 16 KiB SRAM · 4 KiB EEPROM · 1.8–5.5 V · 20 MHz maximum · -40 to +85 °C
ATmega644: 64 KiB flash · 4 KiB SRAM · 2 KiB EEPROM. Choose the marked order code for voltage, clock, and temperature.
ATmega644V-10AU: 64 KiB flash · 4 KiB SRAM · 2 KiB EEPROM · 1.8–5.5 V · 10 MHz maximum · -40 to +85 °C
ATmega644-20AU: 64 KiB flash · 4 KiB SRAM · 2 KiB EEPROM · 2.7–5.5 V · 20 MHz maximum · -40 to +85 °C
ATmega32: 32 KiB flash · 2 KiB SRAM · 1 KiB EEPROM. Choose the marked order code for voltage, clock, and temperature.
ATmega32L-8AU: 32 KiB flash · 2 KiB SRAM · 1 KiB EEPROM · 2.7–5.5 V · 8 MHz maximum · -40 to +85 °C
ATmega32L-8AUR: 32 KiB flash · 2 KiB SRAM · 1 KiB EEPROM · 2.7–5.5 V · 8 MHz maximum · -40 to +85 °C
ATmega32-16AU: 32 KiB flash · 2 KiB SRAM · 1 KiB EEPROM · 4.5–5.5 V · 16 MHz maximum · -40 to +85 °C
ATmega32-16AUR: 32 KiB flash · 2 KiB SRAM · 1 KiB EEPROM · 4.5–5.5 V · 16 MHz maximum · -40 to +85 °C

ATmega1284/ATmega1284P data sheet· DS40002070B · Pin configuration, electrical characteristics, ordering table and serial programming.
ATmega644 data sheet· 2593O · Pin configuration, electrical characteristics, ordering table and serial programming.
ATmega32 data sheet· 2503Q · Pin configuration, electrical characteristics, ordering table and serial programming.
ATmega_DFP Device Family Pack· Machine-readable device definition: package contacts, peripheral routes, and memory sizes.
AVR Microcontroller Hardware Design Considerations· Power supply, reset network, and programmer connection guidance.
ATmega1284 documentation and errata· Check current manufacturer documentation, ordering status and silicon revision applicability.
ATmega1284P documentation and errata· Check current manufacturer documentation, ordering status and silicon revision applicability.
ATmega644 documentation and errata· Check current manufacturer documentation, ordering status and silicon revision applicability.
ATmega32 documentation and errata· Check current manufacturer documentation, ordering status and silicon revision applicability.
AVR source register· Source identifiers, applicability, retrieval dates, and SHA-256 digests.