Spark Logic

BQ24010 single-cell linear charger connection guide

BQ24010 single-cell linear charger DRC VSON-10 wiring guide with power, signal assignments, and bench checks.

DRC VSON-10

11 contacts Current package

Texas Instruments · 3 × 3 mm nominal VSON with exposed thermal pad.

3 × 3 mm DRC0010J package, −40 to +85 °C catalog operating ambient.

Set up the charger with a battery simulator

Required

Use a 3.6 V battery simulator that can sink the programmed charge current. The fixed TS divider represents a normal-temperature pack for this bench test. Use the thermistor network in Figure 3 with a real battery.

  • 5 V input
  • Ground
    • VSS (5)
    • EP (11)
    • CIN.2
    • CBAT.2
    • RSET.2
    • RT2.2
    • Battery simulator return
    • Supply return
  • Simulated battery positive
  • Charge-current setting
  • Simulated normal temperature
CIN 100 nF ceramic between 5 V input and Ground5 V inputCIN 100 nF ceramicGround
CBAT 1 µF ceramic between Simulated battery positive and GroundSimulated battery positiveCBAT 1 µF ceramicGround
RSET 8.25 kΩ between Charge-current setting and GroundCharge-current settingRSET 8.25 kΩGround
RT1 10 kΩ between 5 V input and Simulated normal temperature5 V inputRT1 10 kΩSimulated normal temperature
RT2 10 kΩ between Simulated normal temperature and GroundSimulated normal temperatureRT2 10 kΩGround

Bench checks

  • Before powering IN, verify continuity from VSS and the exposed pad to ground and confirm the simulator polarity.
  • With IN at 5 V, check that TS is near 2.5 V and fast-charge current is about 0.10 A at a 3.6 V simulated battery.

Texas Instruments SLUS530K, Figure 3 and Equation 4. Current is 335 × 2.50 V ÷ 8.25 kΩ nominal.

Connection scenarios

Read the power and charge outputs

On the same simulator fixture, pull PG, STAT1 and STAT2 up individually to the 5 V bench rail through 10 kΩ resistors.

  • 5 V input
  • Ground
    • VSS (5)
    • EP (11)
    • CIN.2
    • CBAT.2
    • RSET.2
    • RT2.2
    • Battery simulator return
    • Supply return
  • Simulated battery positive
  • Charge-current setting
  • Simulated normal temperature
  • Input power status
  • Charge status 1
  • Charge status 2
CIN 100 nF ceramic between 5 V input and Ground5 V inputCIN 100 nF ceramicGround
CBAT 1 µF ceramic between Simulated battery positive and GroundSimulated battery positiveCBAT 1 µF ceramicGround
RSET 8.25 kΩ between Charge-current setting and GroundCharge-current settingRSET 8.25 kΩGround
RT1 10 kΩ between 5 V input and Simulated normal temperature5 V inputRT1 10 kΩSimulated normal temperature
RT2 10 kΩ between Simulated normal temperature and GroundSimulated normal temperatureRT2 10 kΩGround
RPG 10 kΩ between 5 V input and Input power status5 V inputRPG 10 kΩInput power status
RS1 10 kΩ between 5 V input and Charge status 15 V inputRS1 10 kΩCharge status 1
RS2 10 kΩ between 5 V input and Charge status 25 V inputRS2 10 kΩCharge status 2

Bench checks

  • Check PG low when valid input is present and compare STAT1 and STAT2 against the charge-status table.

Texas Instruments SLUS530K, Status Outputs and Figure 3. The pull-up values are fixture choices.

DRC VSON-10 wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Top view, with pin 1 on the upper left. The exposed thermal pad is underneath the body.
EP is the exposed center pad on the underside.
Selected pin details

5 · VSS

Return · Ground

Supply and battery return. Connect to ground along with the exposed pad.

Texas Instruments SLUS530K, Device Information

Electrical limits · Pin in the reference

Models and documents

The DRC pinout applies to BQ24010. Other bqTINY parts substitute CE or TTE for some of the BQ24010 functions.

BQ24010DRCR
3 × 3 mm DRC0010J package, −40 to +85 °C catalog operating ambient.
BQ24010DRCR.A
3 × 3 mm DRC0010J package, −40 to +85 °C catalog operating ambient.
  • Texas Instruments SLUS530K· Rev. K, January 2014. Device information, current setting, temperature supervision and typical circuit.
  • Source register· Document revisions, applicable order codes, consulted sections and available file checksums.