Cortex-M3 processor core

Cortex-M3 implements Armv7-M with the Thumb instruction set and its Thumb-2 extensions. Common peripherals and physical pin assignments are defined by the MCU vendor.

Core features

Feature	What to verify
Architecture	Armv7-M
Exceptions	The core supports prioritized and nested interrupts through the NVIC. Device headers define the MCU interrupt names and implemented priority bits.
Instruction set	Thumb-2 includes integer divide and bit-field instructions. Compile for Cortex-M3 before testing code on devices from different vendors.
Debug	Serial Wire Debug is a core debug interface. Locate its pins, reference voltage and reset connection in the device and PCB documentation.

Before bring-up

Use the startup file, linker script and peripheral header for the exact chip. Confirm the Flash start address and SRAM size before programming.
At first boot, read the debug ID and check the reset vector before enabling clocks and peripherals.

STM32F103 pinout· STMicroelectronics implementation.
GD32F103 pinout· GigaDevice implementation.
GD32F130 pinout· GigaDevice implementation with different peripheral assignments.

Manufacturer documents

Arm Cortex-M3· Processor datasheet and technical documentation.
Arm Cortex-M processor comparison· Architecture, instruction-set extensions and optional debug features.
Arm Cortex-M documentation index· Technical reference manuals, programming guides and revision-specific errata.