I²C control
Use 0x4A when AD0 is low and 0x4B when it is high. Pull up to VL.
A stereo digital-to-analog converter with an I²C control port, headphone charge pump and two full-bridge PWM speaker outputs.
Tape and reel.
Single-ended analog bypass input 4A.
| Pin | Signal | Direction | Function |
|---|---|---|---|
| 1 | SDA Bidirectional | Bidirectional | Open-drain serial control data line. Pull up to VL. |
| 2 | SCL Input | Input | I²C control port clock input. |
| 3 | AD0 Input | Input | Least significant bit of the seven-bit I²C address. |
| 4 | SPKR_OUTA+ Output | Output | Positive PWM output for speaker A. Connect speaker A across its pair. |
| 5 | VP Supply | Supply | Power for the PWM speaker output stages. |
| 6 | SPKR_OUTA− Output | Output | Negative PWM output for speaker A. This lead is driven and is not ground. |
| 7 | SPKR_OUTB+ Output | Output | Positive PWM output for speaker B. Connect speaker B across its pair. |
| 8 | VP Supply | Supply | Second supply lead for the PWM output stages. |
| 9 | SPKR_OUTB− Output | Output | Negative PWM output for speaker B. This lead is driven and is not ground. |
| 10 | −VHPFILT Output | Output | Negative headphone supply filter output. Connect a low-ESR capacitor to ground. |
| 11 | FLYN Output | Output | Negative terminal of the charge-pump flying capacitor. |
| 12 | FLYP Output | Output | Positive terminal of the charge-pump flying capacitor. |
| 13 | +VHP Supply | Supply | Positive headphone amplifier and charge pump supply. |
| 14 | HP/LINE_OUTB Output | Output | Channel B headphone or line-level output. |
| 15 | HP/LINE_OUTA Output | Output | Channel A headphone or line-level output. |
| 16 | VA Supply | Supply | Internal analog supply. |
| 17 | AGND Return | Return | Analog ground reference. |
| 18 | FILT+ Output | Output | Internal reference filter output. Bypass to ground. |
| 19 | VQ Output | Output | Quiescent-voltage filter output. |
| 20 | TSTO No connection | No connection | Test output. Leave floating. |
| 21 | AIN4A Input | Input | Single-ended analog bypass input 4A. |
| 22 | AIN4B Input | Input | Single-ended analog bypass input 4B. |
| 23 | AIN3A Input | Input | Single-ended analog bypass input 3A. |
| 24 | AIN3B Input | Input | Single-ended analog bypass input 3B. |
| 25 | AIN2A Input | Input | Single-ended analog bypass input 2A. |
| 26 | AIN2B Input | Input | Single-ended analog bypass input 2B. |
| 27 | AFILTA Output | Output | Channel A anti-alias filter connection for analog passthrough. |
| 28 | AFILTB Output | Output | Channel B anti-alias filter connection for analog passthrough. |
| 29 | AIN1A Input | Input | Single-ended analog bypass input 1A. |
| 30 | AIN1B Input | Input | Single-ended analog bypass input 1B. |
| 31 | SPKR/HP Input | Input | External speaker/headphone selection input. |
| 32 | RESET Input | Input | Active-low hardware reset. Hold low while the supplies settle. |
| 33 | VL Supply | Supply | Digital interface supply. Sets the logic voltage for the host and audio ports. |
| 34 | VD Supply | Supply | Internal digital core supply. |
| 35 | DGND Return | Return | Internal digital ground reference. |
| 36 | TSTO No connection | No connection | Second test output. Leave floating. |
| 37 | MCLK Input | Input | Master clock for digital audio conversion. |
| 38 | SCLK Bidirectional | Bidirectional | Serial audio bit clock. Direction depends on master/slave configuration. |
| 39 | SDIN Input | Input | Serial digital audio data input. |
| 40 | LRCK Bidirectional | Bidirectional | Audio left/right clock. Direction depends on master/slave configuration. |
| PAD | EP Thermal pad | Thermal pad | Ground for the speaker PWM output stages and charge pump. Solder to the board ground plane. |
Use 0x4A when AD0 is low and 0x4B when it is high. Pull up to VL.
Select the serial audio format and clock ratios from the data sheet.
The charge pump provides the negative amplifier rail. Follow Figure 1 for output filtering and the recommended pump capacitors.
Each speaker is driven by a full bridge across its own pair. Each negative terminal is an active output.
| Parameter | Limit | Conditions and source |
|---|---|---|
| Analog, digital and headphone supplies1.65–2.63 V | 1.65–2.63 V | VA, VD and +VHP recommended range. Cirrus Logic DS792F2, § 3 |
| PWM speaker supply1.60–5.25 V | 1.60–5.25 V | VP recommended range. Cirrus Logic DS792F2, § 3 |
| I²C address with AD0 low0x4A | 0x4A | Seven-bit address. The on-wire write address byte is 0x94. Cirrus Logic DS792F2, § 4.12 |
The map covers the bare 40-contact QFN. The control-port fixture keeps the audio paths powered down and confirms identity before loading an audio configuration.