GStek GS72V3 synchronous buck controller connection guide
GStek GS72V3 synchronous buck controller (PSOP-8 (SP)) connection guide. Check supply and startup. Trace the bootstrap and MOSFET stage.
PSOP-8 (SP)
9 contacts Current packageCheck supply and startup
RequiredOn an unpowered board, identify the controller supply at pin 5 and the separate VIN connection at the high-side MOSFET drain. Some boards use the same rail for both. Keep the existing VCC bypass capacitor and COMP/EN compensation network in circuit.
- Controller supply
- VCC bypass capacitor positive
- Controller supply rail
- Power-stage input
- Power-stage VIN rail
- High-side MOSFET drain
- VIN bulk capacitor positive
- Ground
- VCC bypass capacitor return
- Power-stage input capacitor return
- Bench supply return
- Shutdown and compensation
- Existing compensation network
- Open-drain shutdown control when fitted
Bench checks
- With power off, verify pin 3 and EP9 connect to board ground and check both supply rails for shorts. Use a current-limited supply at the board’s rated input voltage.
- Check for 4.5–13.2 V from pin 5 to GND and verify the MOSFET drain supply separately. VCC above the power-on threshold does not prove that VIN has reached the power stage.
- Check whether an external transistor holds COMP/EN below 0.3 V. Release the pull-down to allow startup. Applying a logic-high drive here interferes with the error amplifier.
GStek GS72V3, rev. 0.4, pp. 3, 5–6, 9
Connection scenarios
Trace the bootstrap and MOSFET stage
Use this map to trace an existing converter. The PHASE labels in the drawing denote the same node. The bootstrap capacitor is typically 0.1 µF in the manufacturer’s single high-side MOSFET example. Follow the board’s existing series and damping components.
- Power-stage input
- Power-stage VIN rail
- QH drain
- High-side gate
- QH gate path
- Low-side gate
- QL gate path
- Bootstrap supply
- CBOOT.1 through the board’s bootstrap path
- Switch node
- QH source
- QL drain
- CBOOT.2
- L1.1
- Filtered output
- L1.2
- COUT.1
- Load positive
- Ground
- QL source
- COUT.2
- Load return
Bench checks
- With power off, verify the PHASE path reaches both MOSFETs and the input side of L1. Check that CBOOT returns to PHASE.
- Use a suitably rated differential probe for BOOT−PHASE and UGATE−PHASE. Reference LGATE to the low-side source. An earth-referenced scope ground clip on PHASE can short the switch node.
- During stable regulation, expect switching near 300 kHz. If you see short bursts and restarts during startup, check VIN at QH and the PHASE rise before suspecting a bad controller.
- For rev. 0.4, compare PHASE to ground during low-side conduction when troubleshooting current limit. Use the fitted MOSFET’s hot on-resistance and the inductor ripple to interpret the trip current.
GStek GS72V3, rev. 0.4, pp. 3, 5–6, 9–10, 13
PSOP-8 (SP) wiring map
Dashed outline shows the underside pad schematically. See the package drawing for the footprint.
1 · BOOT
Connect the bootstrap capacitor between BOOT and PHASE. Measure the voltage across those two pins.
Models and documents
The pin map and measurements use the full rev. 0.4 datasheet for GS72V3SP-R. The rev. 1.0 product brief shows a different overcurrent setting network. Check the board and document revision before interpreting current limit or replacing its parts.
- GS72V3SP-R
- PSOP-8 (SP) in tape and reel.
- GS72V3 datasheet, rev. 0.4 (March 2012)· External copy of the full GStek datasheet. See pp. 2–4 for the package and ordering code, pp. 5–6 for limits, and pp. 9–13 for operation and application information.
- GS72V3 product brief, rev. 1.0 (April 2015)· External copy of the later GStek brief. Its drawing and overcurrent description differ from rev. 0.4.
