GStek GS72V3 synchronous buck controller connection guide
GStek GS72V3 synchronous buck controller (PSOP-8 (SP)) connection guide. Check supply and startup. Trace the bootstrap and MOSFET stage.
PSOP-8 (SP)
9 contacts Current packageCheck supply and startup
RequiredOn an unpowered board, identify the controller supply at pin 5 and the separate VIN connection at the high-side MOSFET drain. Some boards use the same rail for both. Keep the existing VCC bypass capacitor and COMP/EN compensation network in circuit.
- Controller supply
- VCC bypass capacitor positive
- Controller supply rail
- Power-stage input
- Power-stage VIN rail
- High-side MOSFET drain
- VIN bulk capacitor positive
- Ground
- VCC bypass capacitor return
- Power-stage input capacitor return
- Bench supply return
- Shutdown and compensation
- Existing compensation network
- Open-drain shutdown control when fitted
Bench checks
- With power off, verify pin 3 and EP9 connect to board ground and check both supply rails for shorts. Use a current-limited supply at the board’s rated input voltage.
- Check for 4.5–13.2 V from pin 5 to GND and verify the MOSFET drain supply separately. VCC above the power-on threshold does not prove that VIN has reached the power stage.
- Check whether an external transistor holds COMP/EN below 0.3 V. Release the pull-down to allow startup. Applying a logic-high drive here interferes with the error amplifier.
GStek GS72V3, rev. 0.4, pp. 3, 5–6, 9
Connection scenarios
Measure the output and feedback divider
Trace FB to the divider after L1. This drawing isolates the DC sense path. Retain the existing AC compensation connected to FB and COMP/EN.
- Filtered output
- VOUT after L1
- Rupper.1
- Output capacitor positive
- Divider midpoint
- Rupper.2
- Rlower.1
- Compensation network FB connection
- Compensation output
- Compensation network COMP connection
- Ground
- Rlower.2
- Output capacitor return
Bench checks
- Measure VOUT at the output capacitor and FB at pin 6 after startup. In regulation FB should be close to 0.6 V.
- Compare VOUT with 0.6 × (1 + Rupper/Rlower). Read the fitted resistor values from the schematic or measure them with power off while accounting for parallel paths.
- If FB is correct but VOUT is wrong, check the divider and remote sense trace. If FB never reaches its target, check VIN, VCC and the gate drive before changing compensation.
GStek GS72V3, rev. 0.4, pp. 3, 5, 9, 11–12
PSOP-8 (SP) wiring map
Dashed outline shows the underside pad schematically. See the package drawing for the footprint.
2 · UGATE
Drives the external high-side N-channel MOSFET. Its source and gate-drive return are at PHASE.
Models and documents
The pin map and measurements use the full rev. 0.4 datasheet for GS72V3SP-R. The rev. 1.0 product brief shows a different overcurrent setting network. Check the board and document revision before interpreting current limit or replacing its parts.
- GS72V3SP-R
- PSOP-8 (SP) in tape and reel.
- GS72V3 datasheet, rev. 0.4 (March 2012)· External copy of the full GStek datasheet. See pp. 2–4 for the package and ordering code, pp. 5–6 for limits, and pp. 9–13 for operation and application information.
- GS72V3 product brief, rev. 1.0 (April 2015)· External copy of the later GStek brief. Its drawing and overcurrent description differ from rev. 0.4.
