Spark Logic

TPS53603 and TPS53603A MOSFET gate drivers

Texas Instruments TPS53603 drives the high-side and low-side MOSFETs of a synchronous buck stage. TPS53603A is a candidate for the reported marking “53E03A TI84F S2YG” if the first line reads “53603A” under magnification.

TPS53603A pins in the Clevo P650SE schematic

DFN8 contactSignal and board connection
1 · BSTFloating driver supply. The bootstrap capacitor goes between BST and SWN.
2 · INPWM command from the upstream regulator controller. Trace it back to the corresponding phase output.
3 · OD*/NCClevo labels this contact OD*/NC. Check the exact board configuration before assigning a function or connecting a signal.
4 · VCCDriver bias supply. The Clevo circuit uses a 5 V rail with local bypassing.
5 · DRVLLow-side gate drive, referenced to PGND.
6 · PGNDDriver ground and the return for the low-side gate drive.
7 · SWNSwitch node at the midpoint of the two MOSFETs. This node is the reference for the floating high-side driver.
8 · DRVHHigh-side gate drive, referenced to SWN.
9 · TPThermal pad named TP in the Clevo schematic. Verify the pad connection on the exact board.

Before bring-up

  • The reported TI84F and S2YG lines do not identify a device family in the public documentation. TI uses separate top markings for manufacturing traceability; the exact meaning of these two lines is unverified.
  • Read the first line under angled light and count the contacts. The 53603A reading is consistent with photographed GPU gate drivers and with a DFN8 device near a pair of power MOSFETs. The supplied text alone leaves the E or 6 character unresolved.
  • On the unpowered board, trace SWN to the phase midpoint and inductor, PGND to the low-side return, and both gate outputs to their MOSFET gates. Verify the bootstrap capacitor across BST and SWN.
  • When examining a running phase, use a differential probe rated for the switch node to measure DRVH relative to SWN. Compare the gate signals to IN and verify driver bias at VCC relative to PGND.
  • TI documents TPS53603DRG in its NexFET evaluation board. Its 5 V driver supply, 12 V power-stage input and 500 kHz switching frequency are test conditions for that board. The public sources here leave the A-suffix electrical limits, input thresholds, timing and interchangeability unverified.

Manufacturer documents