I read you can change the pitch of a voice by sampling sound into a circular buffer, and then reading from that buffer at a different rate, so no need for fourier transformations and difficult mathematics.
So i borrowed the DMA ADC code from the scope project (altered it a bit for this purpose), and connected a MP4725 DAC to my maple mini, and had some fun testing this little trick 
How to wire it (on a maple mini):
I2C port 1 gets a mp4725 DAC
pin 3: analog input for the microphone
pin 4: analog input for a potentiometer that will alter the pitch
How it works:
I modified the dma code of this project to
– sample slower (about 35 khz)
– sample 2 pins simultaneously iso 1 pin interleaved
– run in circular mode
– only put the data of the sound sample pin into the memory (so i’m sampling 16 bits via dma, even though the 2 channels together are writing all 32 bits of the data register). I read the other pin directly from the dataregister when i need it.
The playback
– uses i2c clockstretching for a variable sampling rate
– tries to smooth out clicks (experiment with it, seems to work fairly well)
feel free to experiment with this fun little project
And let me know if you find better settings for buffer size & click removal
First thing that can be tried is a higher sampling rate, you should be able to push the DAC to 60khz with this code, and the sampling rate for the microphone can naturally also go a lot faster .
Also better would be using a timer to send the samples , but i just quickly wrote it with a delay .
Also fun to try, program some special effects on it:
– maybe some echo?
– i read a dalek vocie is made by multiplying a sound signal by a sine wave (i think 100hz or something like that)
– feel free to add ideas
#include <dma_private.h>
#include <libmaple/adc.h>
#include <wirish.h>
#include <libmaple/i2c.h>
#define ADC_CR1_SIMULTANEOUS 0x60000 // simultaneous mode DUAL MODE bits 19-16
#define BufferSize 2048
uint16_t bufferPos = 0;
const int8_t analogInPin = PB0;
const int8_t analogInPin2 = PA7;
uint16_t dataBuffer[BufferSize];
const uint16_t clickTreshold = 100;
uint16_t lastSample = 2048;
uint16_t* analog2 = (uint16_t*)&(ADC1->regs->DR) + 1;
int modulationDelay = 40;
int wait = 0;
void i2c_str_InitPort(i2c_dev *device, uint8_t divider);
void i2c_str_StartSending(i2c_dev *device, uint8_t address);
void i2c_str_sendBytes(i2c_dev *device, uint8_t data, uint8_t data2);
void i2c_str_ReleasePort(i2c_dev *device);
void i2c_str_StopSending(i2c_dev *device);
#define I2C_STRETCH_SB_TIMEOUT 10000 //how many times we will check the status registers to see if the device is starting
#define I2C_STRETCH_DIV_400KHZ 30
#define I2C_STRETCH_DIV_600KHZ 20
#define I2C_STRETCH_DIV_800KHZ 15
#define I2C_STRETCH_DIV_1200KHZ 10
void setup()
{
Serial.begin();
pinMode(4, INPUT_ANALOG);
setADC();
startSampling ();
i2c_str_InitPort(I2C1, I2C_STRETCH_DIV_600KHZ);
i2c_str_StartSending(I2C1, 0x60);
}
void loop()
{
uint16_t sample = dataBuffer[bufferPos];
if((uint16_t)(sample - lastSample) > clickTreshold && (uint16_t)(lastSample - sample) > clickTreshold)
{
if(sample > lastSample)
sample = lastSample + clickTreshold;
else
sample = lastSample - clickTreshold;
}
i2c_str_sendBytes(I2C1, (uint8_t)(sample>>8), sample & 255);
bufferPos = (++bufferPos)%BufferSize;
lastSample = sample;
delayMicroseconds(20 + (*analog2>>7));
}
void startSampling ()
{
dma_init(DMA1);
adc_dma_enable(ADC1);
dma_setup_transfer(DMA1, DMA_CH1, &ADC1->regs->DR, DMA_SIZE_16BITS,
dataBuffer, DMA_SIZE_16BITS, (DMA_MINC_MODE | DMA_CIRC_MODE));// Receive buffer DMA
dma_set_num_transfers(DMA1, DMA_CH1, BufferSize);
dma_enable(DMA1, DMA_CH1);
}
void setADC ()
{
// const adc_dev *dev = PIN_MAP[analogInPin].adc_device;
int pinMapADCin = PIN_MAP[analogInPin].adc_channel;
int pinMapADCin2 = PIN_MAP[analogInPin2].adc_channel;
adc_set_prescaler(ADC_PRE_PCLK2_DIV_8);
adc_set_sample_rate(ADC1, ADC_SMPR_239_5);
adc_set_sample_rate(ADC2, ADC_SMPR_239_5);
// adc_reg_map *regs = dev->regs;
adc_set_reg_seqlen(ADC1, 1);
ADC1->regs->SQR3 = pinMapADCin;
ADC1->regs->CR2 |= ADC_CR2_CONT; // | ADC_CR2_DMA; // Set continuous mode and DMA
ADC1->regs->CR1 |= ADC_CR1_SIMULTANEOUS;
ADC1->regs->CR2 |= ADC_CR2_SWSTART;
ADC2->regs->CR2 |= ADC_CR2_CONT; // ADC 2 continuos
ADC2->regs->SQR3 = pinMapADCin2;
}
void adc_dma_enable(const adc_dev * dev) {
bb_peri_set_bit(&dev->regs->CR2, ADC_CR2_DMA_BIT, 1);
}
void adc_dma_disable(const adc_dev * dev) {
bb_peri_set_bit(&dev->regs->CR2, ADC_CR2_DMA_BIT, 0);
}
static void (*i2c_str_old_error_handler)(i2c_dev *dev);
void i2c_str_InitPort(i2c_dev *device, uint8_t divider)
{
i2c_peripheral_disable(device);
i2c_bus_reset(device);
i2c_init(device);//initialize it
i2c_config_gpios(device);//configure the gpios
device->regs->CR2 = I2C_CR2_ITERREN | 36; //dma enabled, peripheral frequency is 36Mhz
device->regs->CCR = I2C_CCR_FS | divider; //default 30
device->regs->TRISE = 11;
}
void i2c_str_ReleasePort(i2c_dev *device)
{
i2c_str_StopSending(device);
}
void i2c_str_StartSending(i2c_dev *device, uint8_t address)
{
i2c_peripheral_enable(device);//enable the port
i2c_start_condition(device);//set the start condition
uint32_t sr1 = device->regs->SR1;
uint32_t sr2 = device->regs->SR2;
uint16_t wait = 0;
while(!(sr1&I2C_SR1_SB))
{
if(wait++ > I2C_STRETCH_SB_TIMEOUT)
{
i2c_peripheral_disable(device);
return;
}
sr1 = device->regs->SR1;
sr2 = device->regs->SR2;
}
i2c_write(device, address<<1);//write the address of the device you want to contact (shifted 1 to the left)
}
void i2c_str_StopSending(i2c_dev *device)
{
i2c_stop_condition(device);
i2c_peripheral_disable(device);
}
bool i2c_str_IsSending(i2c_dev *device)
{
return !(device->regs->SR1 & I2C_SR1_TXE);
}
bool i2c_str_IsError(i2c_dev *device)
{
return device->regs->SR1 & (I2C_SR1_BERR | I2C_SR1_ARLO | I2C_SR1_AF | I2C_SR1_PECERR | I2C_SR1_TIMEOUT);
}
bool i2c_str_PortEnabled(i2c_dev *device)
{
return device->regs->CR1 & I2C_CR1_PE;
}
void i2c_str_sendByte(i2c_dev *device, uint8_t data)
{
uint32_t sr1 = device->regs->SR1;
uint32_t sr2 = device->regs->SR2;
if(sr1&(I2C_SR1_BTF | I2C_SR1_TXE | I2C_SR1_ADDR))
{
i2c_write(device, data);
}
}
void i2c_str_sendBytes(i2c_dev *device, uint8_t data, uint8_t data2)
{
uint32_t sr1 = device->regs->SR1;
uint32_t sr2 = device->regs->SR2;
if(sr1&(I2C_SR1_BTF | I2C_SR1_ADDR))
{
i2c_write(device, data);
i2c_write(device, data2);
}
}
You might like to have a crack at digital ring modulation too, I think that is probably how the Daleks are synthesised.
I suspect the big limitation is RAM, as 20k on the F103C (and even the 64k on the F103V etc), is not going to give you a very long time delay buffer to implement things like echo.
The FFT project in another thread, may produce some interesting output audio, if the audio was reconstructed from the FFT. However I think the speed of the FFT is going to be to slow to make it usable for voice changing etc, though I suppose it may create some interesting effects
(Though I’m not precisely sure how you reconstruct a waveform based on a FFT)
I suspect the big limitation is RAM, as 20k on the F103C (and even the 64k on the F103V etc), is not going to give you a very long time delay buffer to implement things like echo.
The FFT project in another thread, may produce some interesting output audio, if the audio was reconstructed from the FFT. However I think the speed of the FFT is going to be to slow to make it usable for voice changing etc, though I suppose it may create some interesting effects
(Though I’m not precisely sure how you reconstruct a waveform based on a FFT)
Now settled for a buffer size of 512 samples, which seems to work best
.And i added a ring modulation to it, and it’s also working well
Re:FFT
i found this
https://www.dsprelated.com/showarticle/800.php
It looks like the forward FFT can be used to create an inverse FFT, wthout too much additional processing.
However, the speed of the FFT will be too slow to be usable for audio.
I was thinking that perhaps an interesting output from the FFT would be to sine wave frequencies and amplitudes of all the points on the spectrum analysis, and sum them together, (using the amplitudes from the spectum analysis)
But perhaps even this would take too long to process.
I remember the “Specdrum” for the Sinclair Zx Spectrum computer.
https://www.dsprelated.com/showarticle/800.php
I remember, as a kid, working out that this just used a resistor ladder DAC.
So somehow I got hold of the software, and built my own simple DAC, at virtually no cost.
(I’ve no idea where I would have gotten the software from, as this was pre-internet and even pre modem; so perhaps someone I knew had the real hardware etc and let me “borrow” the program)
I’ve taken a look at your code, but I don’t understand 2 things
The I2C code has a comments about DMA
device->regs->CR2 = I2C_CR2_ITERREN | 36; //dma enabled, peripheral frequency is 36Mhz
but as far as I can tell, you are not using DMA to output to I2C, you are calling i2c_write() from loop()?
You seem to be sub-sampling the input buffer into the output buffer using delayMicroseconds
Am I reading the code correctly?
Re:FFT
i found this
https://www.dsprelated.com/showarticle/800.php
It looks like the forward FFT can be used to create an inverse FFT, wthout too much additional processing.
However, the speed of the FFT will be too slow to be usable for audio.
I was thinking that perhaps an interesting output from the FFT would be to sine wave frequencies and amplitudes of all the points on the spectrum analysis, and sum them together, (using the amplitudes from the spectum analysis)
But perhaps even this would take too long to process.
I should be able to easily modify the code to use the DAC on the F103V
I should be able to easily modify the code to use the DAC on the F103V
1. you must have an antialiasing filter in front of ADC, as well as some filtering at the DAC output
2. the messing with spectra for that purposes works usually:
a) you have got a ping/pong buffers
b) you do ADC into the ping one (via DMA), while in parallel you mess with FFT etc in the pong one
c) when the ping is full, DMA switches automatically the ADC stream to the pong one
d) then you do FFT etc in the ping one
e) and vice versa in a loop.
That is only way how to produce a continual onfly operation of ADC->FFT->something_do_with_spectra->IFFT->DAC
This is how it works with dspic33F.. microcontrollers. I doubt it is possible with F103.. But maybe there is a trick how to do it..
With 5000Hz sampling rate for “speech” you get 0.2secs to do FFT->something_do_with_spectra->IFFT-DAC.
Quite a lot of time
I agree.
I doubt the F103 is fast enough to use FFT for realtime audio processing.
Kinda’ related…
I did a bit of research and found that STM have an application note about a vocoder using the F103, however I’m not sure they use the term vocoder to mean what I thought it meant.
The application note, discusses recording and compression of voice using the STM32
http://www.st.com/content/ccc/resource/ … 204907.pdf
And I eventually found the example code, but it will not work with the libmaple core (or I suspect the HAL MX core) as it uses the STM32 standard peripheral lib
Anyway, just for the record here is the download page
But back to Voice changer>
As I mentioned above, you get 0.2secs for playing with FFT-IFFT (1024point FFT, 5000Hz sampling rate, 2.5kHz speech bandwidth, ham radio quality).
That is a lot of time.
You do 1024FFT in 3msecs, the same time you need for IFFT.
So there is 0.194secs for playing with the Spectra (filtering, reversing, etc..).
If you master the ping/pong method with F103, you can do it..
If the RAM would be insufficient with 1024FFT, do it with 512 or 256, no big difference in quality.
I thought that the 1024 pt fft was being computed in 2mS
So FFT + IFFT would be 4mS for 1024 (I will round this to 5ms, but I know this is optimistic)
If this was cut down to perhaps 32 point FFT, and had corresponding decrease in time taken, it would yield perhaps 32/1024 x 5ms = 164uS
Round to 200uS perhaps….
Or did I get my maths wrong ?
When you sample ADC into the ping buffer, you need 204.8ms to fill it full (5KHz sampling rate, 1024samples).
That is the TIME you have got available for the whole FFT->messingwithspectra->IFFT->DAC process within the pong buffer.
(Because you sample the ADC via DMA into the ping AND mess with FFT in pong in parallel).
A plethora of time..
Then you reverse (when the ping buffer is full – that is signalized by DMA flag or interrupt) – you start sample ADC into the pong buffer and do FFT-IFFT in the ping – again: you have got 204.8ms for playing with FFT->messingwithspectra->IFFT->DAC process within the ping buffer.
Without loosing a single sample..
Therefore it is called Ping-Pong.
The time available for FFT->messingwithspectra->IFFT->DAC process with the Ping-Pong method is:
(1/ADC_sampling_rate) * Number_of_FFT_points
Example:
1/5000*1024 = 204.8msecs
So, we already run the ADC on DMA, and could use DMA to output to either I2C DAC or internal DAC ( on the F103RC and larger MCUs in the family)
And use 2 buffers, i.e one filling and one being processed the being output.
Yes… 200ms is loads of time.
It would be interesting, just to run such a system e.g. 1024 point fft at 5khz sampling, and listen to what the reconstructed audio, of normal speach sounds like.
To accumplish a pitch change, I presume you could just move the data so that what was in bin[n] gets moved to bin[n+ pitch_shift] albeit this is granular.
You can do with spectral lines what you want (with some limitations, subject to rocket science
).You can make filters (by cutting the lines off – low, highpass, notch) or moving the lines up/down (to change the pitch], or reverse the spectra (to encrypt), or noise/denoise, mix, etc, etc. There are tons of books written about that matter
Thanks
When you sample ADC into the ping buffer, you need 204.8ms to fill it full (5KHz sampling rate, 1024samples).
But I think it should be OK, it just gives far less time to process the audio when in the Fourier domain. So rather than around 200ms, there would only be around 30mS
Input FFT takes 2mS for 1024 points. Output FFT will take about the same.
So that leaves around 25mS for processing 1024 points (512 pairs)
Which sounds like it should be enough to do some processing.
But, there is always a chance I overlooked something which kills the whole idea
When you sample ADC into the ping buffer, you need 204.8ms to fill it full (5KHz sampling rate, 1024samples).
I think it may be best to try to filter extenally, e.g. just use a normal R C filter, at perhaps 5kHz, so that any signals at 17khz would be so small they would be inaudible
When you sample ADC into the ping buffer, you need 204.8ms to fill it full (5KHz sampling rate, 1024samples).
When you sample ADC into the ping buffer, you need 204.8ms to fill it full (5KHz sampling rate, 1024samples).
Usually you do not set ADC sampling rate by the ADC clock dividers, but via ADC conversion trigger, which could be, for example, driven by a timer’s output pulse/edge/period/PWM, etc..
Example> Set ADC clock to 13 clock cycles (as fast as you can for given ADC precision), set timerX to trigger the ADC conversion every 200usecs (5KHz Sampling rate), and do direct the ADC output via DMA to a buffer called Buffer_Ping[1024]. A nice to have would be if the DMA can signal the Buffer_PIng is full (in order to switch to Pong).
The same story with DAC (shoot data from Buffer_Pong out through DAC via DMA, the sampling is given by timerY set to ie 200usecs).
A typical setup I’ve found somewhere:
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; <<< here you set the ADC Sampling rate as you wish (or better to say as the Timer1 “allows”)
/* TIM1 configuration ------------------------------------------------------*/
/* Time Base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFF;
TIM_TimeBaseStructure.TIM_Prescaler = 0x4;
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
/* TIM1 channel1 configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 0x7F;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
/* DMA1 Channel1 Configuration ----------------------------------------------*/
DMA_DeInit(DMA1_Channel1);
DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1_DR_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)ADC_RegularConvertedValueTab;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = 32;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
/* Enable DMA1 channel1 */
DMA_Cmd(DMA1_Channel1, ENABLE);
/* ADC1 configuration ------------------------------------------------------*/
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = 1;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel14 configuration */
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 1, ADC_SampleTime_13Cycles5);
Usually you do not set ADC sampling rate by the ADC clock dividers, but via ADC conversion trigger, which could be, for example, driven by a timer’s output pulse/edge/period/PWM, etc..
Example> Set ADC clock to 10MHz, set timerX to trigger the ADC conversion every 200usecs (5KHz), and do direct the ADC output via DMA to a buffer called Buffer_Ping[1024]. A nice to have would be if the DMA can signal the Buffer_PIng is full (in order to switch to Pong).
The same story with DAC (shoot data from Buffer_Pong out through DAC via DMA, the sampling is given by timerY set to ie 200usecs).
A typical setup I’ve found somewhere:
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; <<< here you set the ADC Sampling rate as you wish
(or better as the Timer1 allows)
/* TIM1 configuration ------------------------------------------------------*/
/* Time Base configuration */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFF;
TIM_TimeBaseStructure.TIM_Prescaler = 0x4;
TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
/* TIM1 channel1 configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 0x7F;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
/* DMA1 Channel1 Configuration ----------------------------------------------*/
DMA_DeInit(DMA1_Channel1);
DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1_DR_Address;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)ADC_RegularConvertedValueTab;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = 32;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel1, &DMA_InitStructure);
/* Enable DMA1 channel1 */
DMA_Cmd(DMA1_Channel1, ENABLE);
/* ADC1 configuration ------------------------------------------------------*/
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = 1;
ADC_Init(ADC1, &ADC_InitStructure);
/* ADC1 regular channel14 configuration */
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 1, ADC_SampleTime_13Cycles5);
“ADC sampling speed/rate” is one thing, and the number of CPU/AHB clocks (conversion speed) for a single ADC conversion is an another one.
They are not related (until some limits).
So I set ADC to full conversion speed (ie 15MHz for 12bit, it depends on MCU) and the Sampling rate I set via TimerX pwm to any value I want.
The same with DAC (there must be a way how to do it).
For example you may have ADC (set to 15MHz conversion speed) working at 4KHz Sampling rate, doing DSP, and outputting the signal via DAC with Sampling speed (DAC sampling speed) of 6KHz (it may sound like Mickey Mouse) 
It must be possible to control the rate at which DMA data is sent to the DAC,
STM have an application note on the DAC, but its really just an overview showing the capabilities of the DAC
http://www.st.com/content/ccc/resource/ … 259245.pdf
I suspect that the DMA controller will need to be triggered by a Timer, and hence the Timer freq sets the sample rate.
Or in this case, if possible, perhaps the best method is to use the ADC (conversion complete) to trigger the DAC DMA; as both the input an output are supposed to be running at precisely the same sample rate
Or perhaps run both the ADC and the DAC on the same Timer
Edit. I found some OpenLibCM3 code that uses the timer to control the DMA for the DAC
It must be possible to control the rate at which DMA data is sent to the DAC,
STM have an application note on the DAC, but its really just an overview showing the capabilities of the DAC
http://www.st.com/content/ccc/resource/ … 259245.pdf
I suspect that the DMA controller will need to be triggered by a Timer, and hence the Timer freq sets the sample rate.
Or in this case, if possible, perhaps the best method is to use the ADC (conversion complete) to trigger the DAC DMA; as both the input an output are supposed to be running at precisely the same sample rate
Or perhaps run both the ADC and the DAC on the same Timer
Edit. I found some OpenLibCM3 code that uses the timer to control the DMA for the DAC
At the moment it looks like a FFT based voice changer is dead in the water, because I would need to write the Inverse FFT in assembler myself. Which is impractical as I have no knowledge of FFTs or ARM assembler.
However, technically it does seem feasible that it would work on the F103.
Its just a shame that none of the old Inverse FFT code that @pito found, will compile on modern versions of gcc.
i.e there is a version of FFT and IFFT which dates to 2008, which looks like it would do the job, but it won’t compile ( assemble ) with gcc 4.4, as strangely there are problems with the assembler instructions missing paramaters.
I wonder if there is an ARM users forum somewhere, which I could post the code to, and try to find out how to update it.
But at the moment I’m stumped…
Here is the FFT that @pito found, but which doesn’t compile 
FFTCM3.S
/* Complex 16 bit Radix 4 FFT and Inverse FFT for Cortex-M3 version 1.0
--------------------------------------------------------------------------
(c) 2008 Ivan Mellen
--------------------------------------------------------------------------
Free Personal, Non-Commercial Use License.
The Software is licensed to you for your personal, NON-COMMERCIAL USE.
If you have questions about this license or would like a different license
please email : imellen(at)embeddedsignals(dot)com
- Radix 4 FFT - supported sizes: N=4,16,64,256,1024,4096
- N>4096 possible with custom coefficients
- 16 bit complex arithmetic, 1Q15 coefficients
- input data remains unmodified
- decimation-in-time with auto scale after each stage - no overflow
- GCC version (Code Sourcery G++ Lite 2007q3-53), requires C preprocessor
- hand optimized THUMB2 assembly for Cortex-M3 (e.g. STM32)
- code optimized with 64 bit flash prefetch and branch speculation in mind
- single function for multiple FFT sizes
- functions are both "C" and assembly callable
Modifications in version 2.0:
- Constant size FFT (faster execution, but N is constant)
- purely real input (almost 2x faster)
- radix 2 stage (for N= 8, 32, 128, 512, 2048, 8192...)
- RAM based coefficients with size optimized generator (for high flash latency)
- speed optimized windowing function(Bartlett,Blackman, Hamming, Hanning, Kaiser)
STM32 FFT benchmarks in CPU cycles based on real hardware measurements:
N - FFT size
L - Flash latency
F,R - coefficients in Flash or RAM
N L=0 F/R L=1 F L=1 r* L=2 F* L=2 r* ARM7TDMI ARM9E dsPIC
64 3575 3797 3636 4588 4007 - 2701 3739
256 19425 20685 19743 25144 21685 38461-43920 13740 19055
1024 98541 105113 100074 128070 109634 - 68534 N/A
Notes:ARM9E - DSP enhanced arm9 core, based on STR910 @96 MHz, RAM coefficients
dsPIC - dsPIC30x / dsPIC33x - results based on Microchip's DSP library
ARM7TDMI - 3rd party, web based benchmark results
*STM32 results for latency L=2 or - source compiled with LATENCY2 defined
IFFT benchmarks (calculated and verified by measurement):
add 6+N/4 to FFT benchmark {22,70,262} for N={64,256,1024}
Code size:
FFT only: 480 bytes
FFT+IFFT: 682 bytes
Coefficient size (Flash or RAM):
N: 16 64 256 1024 4096
size: 48 240 1008 4080 16368 bytes
------------------------------------------------------------------------------
Usage example: add this file to your project. In C code:
//declare functions
void fftR4(short *y, short *x, int N);
void ifftR4(short *y, short *x, int N);
// prepare test input data
short x[512]; // input data 16 bit, 4 byte aligned x0r,x0i,x1r,x1i,....
short y[512]; // output data 16 bit,4 byte aligned y0r,y0i,y1r,y1i,....
short z[512]; // same format...
for (i=0;i
for (i=0;i
{ x[i+0]=16384; x[i+2]=16384; x[i+4]=-16384; x[i+6]=-16384;}
// x = [ 16384,16384,-16384,-16384,16384,...] 1/4 Fsampling
//call functions
fftR4(y, x, 256); // y is in frequency domain y[128]=
ifftR4(z, y, 256); // z should be x/N + noise introduced by 16 bit truncating
// expected results:
//y[128]is 8191; y[129] is -8190 y[384]is 8191; y[385]is 8191 rest 0 + noise
//z[2n] is 64 64 -64 -64 .. z[2n+1] is 0 all +- 1 (noise)
------------------------------------------------------------------------------
*/
// This file contains two functions :
// void fftR4(short *y, short *x, int N); // radix 4 FFT
// void ifftR4(short *y, short *x, int N); // radix 4 inverse FFT
.syntax unified
.thumb
.global fftR4
.global ifftR4
//#define LATENCY2 //comment this line if flash latency
#define y R0 // short *y -output complex array
#define x R1 // short *x -input complex array
#define N R2 // int N - number of samples 4,16,64,256,1024,4096
#define c R0 // short *c - coefficient array
#define Bl R2 // the number of blocks
#define R R3 // the number of samples in each block
#define x0r R4
#define x0i R5
#define x1r R6
#define x1i R7
#define x2r R8
#define x2i R9
#define x3r R10
#define x3i R11
#define y3r x3i
#define y3i x3r
#define tmp0 R12 // temporary0
#define tmp1 R14 // temporary1
// complex load, x=[a], a+=offset in register data from RAM (0 wait states)
.macro LOADC dr,di, a, offset //5 cycles
ldrsh di, [a, #2]
ldrsh dr, [a] //ldrsh $x._r, [$a], $offset
adds a, offset
.endm
// cofficient complex load, c=[a], a=a+ 4 ;Wk from FLASH (1-4 wait states)
.macro LOADCF xr,xi, a //4 cycles
ldr xr, [a], #4 //read 2 shorts as 32 bits
asr xi, xr,#16 //im extract
sxth xr,xr //re extract
.endm
// coefficient complex load, c=[a], a=a+ 4 ; Wk from RAM (0 wait states)
// .macro LOADCF xr,xi, a //4 (or 3?) cycles
// ldrsh xi, [$a, #2]
// ldrsh xr, [$a],#4 //ldrsh not pipelined in STM32, macro not used
// .endm
// complex load, xc=[a], a=a-register offset
.macro LOADCMi xr,xi, a, offset //5 cycles
ldrsh xi, [a, #2]
ldrsh xr, [a]
subs a, offset //ldrsh xr, [$a], offset
.endm
// complex store, [a]=x,c a=a+ immediate offset
.macro STRC xr,xi, a, offset //2 cycles
strh xi, [a, #2]
strh xr, [a], offset
.endm
// complex store, [a]=x, a+=offset in register
.macro STRCR xr,xi, a, offset //3 cycles
strh xi, [a, #2]
strh xr, [a]
adds a, offset
.endm
// Multiply Complex Conjugate a=(xr+i*xi)*(cr-i*ci)
// x = xr + i*xi
// c = cr + i*ci ;6 cycles
.macro MULCC ar,ai, xr,xi,cr,ci
mul tmp0, xi, cr // tmp0=xi*cr
mul tmp1, xi, ci // tmp1=xi*ci
mls ai, xr, ci,tmp0 // ai=tmp0-xr*ci = xi*cr - xr*ci
mla ar, xr, cr,tmp1 // ar=tmp1+xr*cr = xr*cr + xi*ci
.endm
// complex Fast Fourier Transform - Four point; scale with shift s
.macro BFFT4 s
add x2r, x2r, x3r // (x2,x3) = (x2+x3, x2-x3)
add x2i, x2i, x3i
sub x3r, x2r, x3r, lsl#1
sub x3i, x2i, x3i, lsl#1
mov x0r, x0r, asr#2 // (x0,x1) = (x0+(x1>>s), x0-(x1>>s))/4
mov x0i, x0i, asr#2
add x0r, x0r, x1r, asr#(2+s)
add x0i, x0i, x1i, asr#(2+s)
sub x1r, x0r, x1r, asr#(1+s)
sub x1i, x0i, x1i, asr#(1+s)
add x0r, x0r, x2r, asr#(2+s) // (x0,x2) = (x0+(x2>>s)/4, x0-(x2>>s)/4)
add x0i, x0i, x2i, asr#(2+s)
sub x2r, x0r, x2r, asr#(1+s)
sub x2i, x0i, x2i, asr#(1+s)
add x1r, x1r, x3i, asr#(2+s) // (x1,y3)=(x1-i*(x3>>s)/4, x1+i*(x3>>s)/4)
sub x1i, x1i, x3r, asr#(2+s)
sub y3r, x1r, x3i, asr#(1+s)
add y3i, x1i, x3r, asr#(1+s)
.endm
//----------------------------------------------------------------------------
// inverse FFT
// void ifftR4(short *y, short *x, int N)
// custom first stage reorders input data: x(n)=x(N-n) n=0:N-1 x(N)=x(0)
// extra cost to fft: 6+N/4 cycles
.thumb_func
.align 3 //speed optimization in STM32
nop.n //alignment optimization
ifftR4: stmfd sp!, {r4-r11, lr}
mov tmp0, #0 // bit reversed counter
movs tmp1,N //; first tmp1=N
.word 0xF3A2FA92 //RBIT R3,R2 //RBIT R,N
lsl R,#3
adds tmp1, x, tmp1, lsl#2 // tmp1=&x[tmp1==N]
ldrsh x0i, [x, #2] // replaces C_LDRmi x[N] by _LDRmi x[0]
ldrsh x0r, [x]
subs tmp1,N //tmp1 still needs to be decremented for 2nd C_LDRmi
b L2 // continue with second load
ifirstStage:
// first stage load and bit reverse
adds tmp1, x, tmp1, lsl#2 // tmp1=&x[tmp1]
LOADCMi x0r,x0i, tmp1, N
L2: LOADCMi x2r,x2i, tmp1, N
LOADCMi x1r,x1i, tmp1, N
LOADCMi x3r,x3i, tmp1, N
BFFT4 0
STRC x0r,x0i, y, #4
STRC x1r,x1i, y, #4
STRC x2r,x2i, y, #4
STRC y3r,y3i, y, #4
adds tmp0,R
.word 0xFEACFA9C // rbit r14,r12//rbit tmp1,tmp0
sub tmp1,N,tmp1 //tmp1=N-tmp1
bne ifirstStage // loop if count non zero
b firstStageFinished
// rest same as normal fft
//----------------------------------------------------------------------------
// void fftR4(short *y, short *x, int N)
.thumb_func
fftR4: stmfd sp!, {r4-r11, lr}
mov tmp0, #0 // bit reversed counter
mov tmp1, #0
.word 0xF3A2FA92 //rbit R3,R2 //RBIT R,N
lsl R,#3
firstStage:
// first stage load and bit reverse
adds tmp1, x, tmp1, lsl#2 // tmp1=&x[tmp1] and clear carry
LOADC x0r, x0i, tmp1, N
LOADC x2r,x2i, tmp1, N
LOADC x1r,x1i, tmp1, N
LOADC x3r,x3i, tmp1, N
BFFT4 0
STRC x0r,x0i, y, #4
STRC x1r,x1i, y, #4
STRC x2r,x2i, y, #4
STRC y3r,y3i, y, #4
adds tmp0,R
.word 0xFEACFA9C // rbit r14,r12//rbit tmp1,tmp0
bne firstStage // loop if count non zero
firstStageFinished: // finished the first stage
sub x, y, N, lsl #2 // x = working buffer
mov R, #16
lsrs Bl,N,4
it eq
ldmeq sp!, {r4-r11, pc} // for N==4 return from function
adr c, coef_table //change if table in RAM
nextStage:
// Bl = the number of blocks
// R = the number of samples in each block
#ifdef LATENCY2 // narrow/wide versions to optimize flash pre-fetch
stm sp!, {x, Bl}
add tmp0, R, R, lsl#1
add.n x, x, tmp0
#else
stmfd sp!, {x, Bl}
add tmp0, R, R, lsl#1
add.w x, x, tmp0
#endif
sub Bl, Bl, #1<
nextBlock:
add Bl, Bl, R, lsl#(16-2)
nextButterfly:
// Bl=((number butterflies left-1)<
LOADCMi x0r,x0i, x, R
LOADCF x3r,x3i, c
MULCC x3r,x3i, x0r,x0i, x3r,x3i
LOADCMi x0r,x0i, x, R
LOADCF x2r,x2i, c
MULCC x2r,x2i, x0r,x0i, x2r,x2i
LOADCMi x0r,x0i, x, R
LOADCF x1r,x1i, c
MULCC x1r,x1i, x0r,x0i, x1r,x1i
LOADC x0r,x0i, x, #0
BFFT4 15 // coefficients are 1Q15
STRCR x0r,x0i, x, R
STRCR x1r,x1i, x, R
STRCR x2r,x2i, x, R
STRC y3r,y3i, x, #4
subs Bl, Bl, #1<
bge nextButterfly
add tmp0, R, R, lsl#1
add x, x, tmp0
sub Bl, Bl, #1
movs tmp1, Bl, lsl#16
it ne
subne c, c, tmp0
bne nextBlock
pop {r1-r2} //LDM sp!, {x, Bl}
mov R, R, lsl#2 // block size *=4
lsrs Bl,Bl,2 //# of blocks /=4
bne nextStage
ldmfd sp!, {r4-r11, pc} //return
.align 2 //32 bit access acceleration
// Note: unused portion of coef_table can be commented to reduce size
coef_table:
// FFT twiddle table of triplets E(3t), E(t), E(2t)
// Where E(t)=cos(t)+i*sin(t) at 1Q15
// N=16 t=2*PI*k/N for k=0,1,2,..,N/4-1
.hword 0x7fff,0x0000, 0x7fff,0x0000, 0x7fff,0x0000
.hword 0x30fc,0x7642, 0x7642,0x30fc, 0x5a82,0x5a82
.hword 0xa57e,0x5a82, 0x5a82,0x5a82, 0x0000,0x7fff
.hword 0x89be,0xcf04, 0x30fc,0x7642, 0xa57e,0x5a82
// N=64 t=2*PI*k/N for k=0,1,2,..,N/4-1
.hword 0x7fff,0x0000, 0x7fff,0x0000, 0x7fff,0x0000
.hword 0x7a7d,0x2528, 0x7f62,0x0c8c, 0x7d8a,0x18f9
.hword 0x6a6e,0x471d, 0x7d8a,0x18f9, 0x7642,0x30fc
.hword 0x5134,0x62f2, 0x7a7d,0x2528, 0x6a6e,0x471d
.hword 0x30fc,0x7642, 0x7642,0x30fc, 0x5a82,0x5a82
.hword 0x0c8c,0x7f62, 0x70e3,0x3c57, 0x471d,0x6a6e
.hword 0xe707,0x7d8a, 0x6a6e,0x471d, 0x30fc,0x7642
.hword 0xc3a9,0x70e3, 0x62f2,0x5134, 0x18f9,0x7d8a
.hword 0xa57e,0x5a82, 0x5a82,0x5a82, 0x0000,0x7fff
.hword 0x8f1d,0x3c57, 0x5134,0x62f2, 0xe707,0x7d8a
.hword 0x8276,0x18f9, 0x471d,0x6a6e, 0xcf04,0x7642
.hword 0x809e,0xf374, 0x3c57,0x70e3, 0xb8e3,0x6a6e
.hword 0x89be,0xcf04, 0x30fc,0x7642, 0xa57e,0x5a82
.hword 0x9d0e,0xaecc, 0x2528,0x7a7d, 0x9592,0x471d
.hword 0xb8e3,0x9592, 0x18f9,0x7d8a, 0x89be,0x30fc
.hword 0xdad8,0x8583, 0x0c8c,0x7f62, 0x8276,0x18f9
// N=256 t=2*PI*k/N for k=0,1,2,..,N/4-1
.hword 0x7fff,0x0000, 0x7fff,0x0000, 0x7fff,0x0000
.hword 0x7fa7,0x096b, 0x7ff6,0x0324, 0x7fd9,0x0648
.hword 0x7e9d,0x12c8, 0x7fd9,0x0648, 0x7f62,0x0c8c
.hword 0x7ce4,0x1c0c, 0x7fa7,0x096b, 0x7e9d,0x12c8
.hword 0x7a7d,0x2528, 0x7f62,0x0c8c, 0x7d8a,0x18f9
.hword 0x776c,0x2e11, 0x7f0a,0x0fab, 0x7c2a,0x1f1a
.hword 0x73b6,0x36ba, 0x7e9d,0x12c8, 0x7a7d,0x2528
.hword 0x6f5f,0x3f17, 0x7e1e,0x15e2, 0x7885,0x2b1f
.hword 0x6a6e,0x471d, 0x7d8a,0x18f9, 0x7642,0x30fc
.hword 0x64e9,0x4ec0, 0x7ce4,0x1c0c, 0x73b6,0x36ba
.hword 0x5ed7,0x55f6, 0x7c2a,0x1f1a, 0x70e3,0x3c57
.hword 0x5843,0x5cb4, 0x7b5d,0x2224, 0x6dca,0x41ce
.hword 0x5134,0x62f2, 0x7a7d,0x2528, 0x6a6e,0x471d
.hword 0x49b4,0x68a7, 0x798a,0x2827, 0x66d0,0x4c40
.hword 0x41ce,0x6dca, 0x7885,0x2b1f, 0x62f2,0x5134
.hword 0x398d,0x7255, 0x776c,0x2e11, 0x5ed7,0x55f6
.hword 0x30fc,0x7642, 0x7642,0x30fc, 0x5a82,0x5a82
.hword 0x2827,0x798a, 0x7505,0x33df, 0x55f6,0x5ed7
.hword 0x1f1a,0x7c2a, 0x73b6,0x36ba, 0x5134,0x62f2
.hword 0x15e2,0x7e1e, 0x7255,0x398d, 0x4c40,0x66d0
.hword 0x0c8c,0x7f62, 0x70e3,0x3c57, 0x471d,0x6a6e
.hword 0x0324,0x7ff6, 0x6f5f,0x3f17, 0x41ce,0x6dca
.hword 0xf9b8,0x7fd9, 0x6dca,0x41ce, 0x3c57,0x70e3
.hword 0xf055,0x7f0a, 0x6c24,0x447b, 0x36ba,0x73b6
.hword 0xe707,0x7d8a, 0x6a6e,0x471d, 0x30fc,0x7642
.hword 0xdddc,0x7b5d, 0x68a7,0x49b4, 0x2b1f,0x7885
.hword 0xd4e1,0x7885, 0x66d0,0x4c40, 0x2528,0x7a7d
.hword 0xcc21,0x7505, 0x64e9,0x4ec0, 0x1f1a,0x7c2a
.hword 0xc3a9,0x70e3, 0x62f2,0x5134, 0x18f9,0x7d8a
.hword 0xbb85,0x6c24, 0x60ec,0x539b, 0x12c8,0x7e9d
.hword 0xb3c0,0x66d0, 0x5ed7,0x55f6, 0x0c8c,0x7f62
.hword 0xac65,0x60ec, 0x5cb4,0x5843, 0x0648,0x7fd9
.hword 0xa57e,0x5a82, 0x5a82,0x5a82, 0x0000,0x7fff
.hword 0x9f14,0x539b, 0x5843,0x5cb4, 0xf9b8,0x7fd9
.hword 0x9930,0x4c40, 0x55f6,0x5ed7, 0xf374,0x7f62
.hword 0x93dc,0x447b, 0x539b,0x60ec, 0xed38,0x7e9d
.hword 0x8f1d,0x3c57, 0x5134,0x62f2, 0xe707,0x7d8a
.hword 0x8afb,0x33df, 0x4ec0,0x64e9, 0xe0e6,0x7c2a
.hword 0x877b,0x2b1f, 0x4c40,0x66d0, 0xdad8,0x7a7d
.hword 0x84a3,0x2224, 0x49b4,0x68a7, 0xd4e1,0x7885
.hword 0x8276,0x18f9, 0x471d,0x6a6e, 0xcf04,0x7642
.hword 0x80f6,0x0fab, 0x447b,0x6c24, 0xc946,0x73b6
.hword 0x8027,0x0648, 0x41ce,0x6dca, 0xc3a9,0x70e3
.hword 0x800a,0xfcdc, 0x3f17,0x6f5f, 0xbe32,0x6dca
.hword 0x809e,0xf374, 0x3c57,0x70e3, 0xb8e3,0x6a6e
.hword 0x81e2,0xea1e, 0x398d,0x7255, 0xb3c0,0x66d0
.hword 0x83d6,0xe0e6, 0x36ba,0x73b6, 0xaecc,0x62f2
.hword 0x8676,0xd7d9, 0x33df,0x7505, 0xaa0a,0x5ed7
.hword 0x89be,0xcf04, 0x30fc,0x7642, 0xa57e,0x5a82
.hword 0x8dab,0xc673, 0x2e11,0x776c, 0xa129,0x55f6
.hword 0x9236,0xbe32, 0x2b1f,0x7885, 0x9d0e,0x5134
.hword 0x9759,0xb64c, 0x2827,0x798a, 0x9930,0x4c40
.hword 0x9d0e,0xaecc, 0x2528,0x7a7d, 0x9592,0x471d
.hword 0xa34c,0xa7bd, 0x2224,0x7b5d, 0x9236,0x41ce
.hword 0xaa0a,0xa129, 0x1f1a,0x7c2a, 0x8f1d,0x3c57
.hword 0xb140,0x9b17, 0x1c0c,0x7ce4, 0x8c4a,0x36ba
.hword 0xb8e3,0x9592, 0x18f9,0x7d8a, 0x89be,0x30fc
.hword 0xc0e9,0x90a1, 0x15e2,0x7e1e, 0x877b,0x2b1f
.hword 0xc946,0x8c4a, 0x12c8,0x7e9d, 0x8583,0x2528
.hword 0xd1ef,0x8894, 0x0fab,0x7f0a, 0x83d6,0x1f1a
.hword 0xdad8,0x8583, 0x0c8c,0x7f62, 0x8276,0x18f9
.hword 0xe3f4,0x831c, 0x096b,0x7fa7, 0x8163,0x12c8
.hword 0xed38,0x8163, 0x0648,0x7fd9, 0x809e,0x0c8c
.hword 0xf695,0x8059, 0x0324,0x7ff6, 0x8027,0x0648
// N=1024 t=2*PI*k/N for k=0,1,2,..,N/4-1
.hword 0x7fff,0x0000, 0x7fff,0x0000, 0x7fff,0x0000
.hword 0x7ffa,0x025b, 0x7fff,0x00c9, 0x7ffe,0x0192
.hword 0x7fea,0x04b6, 0x7ffe,0x0192, 0x7ff6,0x0324
.hword 0x7fce,0x0711, 0x7ffa,0x025b, 0x7fea,0x04b6
.hword 0x7fa7,0x096b, 0x7ff6,0x0324, 0x7fd9,0x0648
.hword 0x7f75,0x0bc4, 0x7ff1,0x03ed, 0x7fc2,0x07d9
.hword 0x7f38,0x0e1c, 0x7fea,0x04b6, 0x7fa7,0x096b
.hword 0x7ef0,0x1073, 0x7fe2,0x057f, 0x7f87,0x0afb
.hword 0x7e9d,0x12c8, 0x7fd9,0x0648, 0x7f62,0x0c8c
.hword 0x7e3f,0x151c, 0x7fce,0x0711, 0x7f38,0x0e1c
.hword 0x7dd6,0x176e, 0x7fc2,0x07d9, 0x7f0a,0x0fab
.hword 0x7d63,0x19be, 0x7fb5,0x08a2, 0x7ed6,0x113a
.hword 0x7ce4,0x1c0c, 0x7fa7,0x096b, 0x7e9d,0x12c8
.hword 0x7c5a,0x1e57, 0x7f98,0x0a33, 0x7e60,0x1455
.hword 0x7bc6,0x209f, 0x7f87,0x0afb, 0x7e1e,0x15e2
.hword 0x7b27,0x22e5, 0x7f75,0x0bc4, 0x7dd6,0x176e
.hword 0x7a7d,0x2528, 0x7f62,0x0c8c, 0x7d8a,0x18f9
.hword 0x79c9,0x2768, 0x7f4e,0x0d54, 0x7d3a,0x1a83
.hword 0x790a,0x29a4, 0x7f38,0x0e1c, 0x7ce4,0x1c0c
.hword 0x7840,0x2bdc, 0x7f22,0x0ee4, 0x7c89,0x1d93
.hword 0x776c,0x2e11, 0x7f0a,0x0fab, 0x7c2a,0x1f1a
.hword 0x768e,0x3042, 0x7ef0,0x1073, 0x7bc6,0x209f
.hword 0x75a6,0x326e, 0x7ed6,0x113a, 0x7b5d,0x2224
.hword 0x74b3,0x3497, 0x7eba,0x1201, 0x7aef,0x23a7
.hword 0x73b6,0x36ba, 0x7e9d,0x12c8, 0x7a7d,0x2528
.hword 0x72af,0x38d9, 0x7e7f,0x138f, 0x7a06,0x26a8
.hword 0x719e,0x3af3, 0x7e60,0x1455, 0x798a,0x2827
.hword 0x7083,0x3d08, 0x7e3f,0x151c, 0x790a,0x29a4
.hword 0x6f5f,0x3f17, 0x7e1e,0x15e2, 0x7885,0x2b1f
.hword 0x6e31,0x4121, 0x7dfb,0x16a8, 0x77fb,0x2c99
.hword 0x6cf9,0x4326, 0x7dd6,0x176e, 0x776c,0x2e11
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CMSIS-DSP: DSP Library Collection with over 60 Functions for various data types: fix-point (fractional q7, q15, q31) and single precision floating-point (32-bit). The library is available for Cortex-M0, Cortex-M3, and Cortex-M4. The Cortex-M4 implementation is optimized for the SIMD instruction set.
You need to apply q15 fft/ifft.
Here it works with Teensy, so it must work with stm32duino too
I did a search on “ARM CMSIS Cortex M3 DSP lib” but can’t find any downloadable code.
I also found some code here
https://github.com/ARM-software/CMSIS/tree/master/CMSIS
and the dozens of fft ifft functions
https://github.com/ARM-software/CMSIS/t … mFunctions
Use q15 one..
I can get the CMSIS fft q15 to compile, but at the moment the code never returns from the fft function.
I dont think its crashed, as the board still resets via USB.
I need to find an example of using this q15 function, as I am not sure whether any “init” functions are needed prior to calling it. As I know some other fft arm functions require initialisation funcs to be called first.
I found what looked like a q15 init func, but it just crashes the MCU, so I think I have an issue with data types.
Actually, what I find more interesting, is how easy it is to pull in these ARM CMSIS code libraries.
I only had to being in 7 headers and 2 C files.
So as the ARM CMSIS libs have loads of other functions, I think there is a reasonable chance someone else may find them handy.
not just FFT, there are loads of other funcs ( as I am sure you are well aware)
