Spark Logic

1Bitsy connection guide

1Bitsy 1Bitsy v1.0d wiring guide with power, signal assignments, and bench checks.

1Bitsy v1.0d

74 contacts Current package

1BitSquared and Piotr Esden-Tempski · STM32F415RGT6 in LQFP-64 · 2.54 mm side and lower through-holes · Micro-USB B · 1.27 mm Cortex debug header.

Power the board over USB

Required

Use a 5 V USB host or supply with a Micro-B cable. The board already includes a series diode, 3.3 V regulator and decoupling. Use USB as the sole supply during these examples.

USB VBUS and ground feed the 1Bitsy. A voltmeter measures the onboard 3.3 V rail against ground.USB source1Bitsy v1.0d5 V VBUSP24-1 VBUSGNDP24-5 GND15/29 3V3DMM VDMM COM

Bench checks

  • Measure about 3.3 V at contact 15 or 29 relative to GND at contact 1 or 16.
  • Check that a peripheral draws only the current allowed by the fitted regulator and the USB source.

1Bitsy v1.0d schematic, power and USB blocks.

Connection scenarios

Wire a 3.3 V I²C peripheral

Use PB6 and PB7 in AF4 open-drain mode. This example assumes one 3.3 V peripheral rated for standard mode and a short bus with total capacitance at most 100 pF. Check for existing pull-ups before fitting the example resistors.

R1 4.7 kΩ between 3.3 V supply and I²C1 clock3.3 V supplyR1 4.7 kΩI²C1 clock
R2 4.7 kΩ between 3.3 V supply and I²C1 data3.3 V supplyR2 4.7 kΩI²C1 data

Bench checks

  • Both lines idle HIGH. Check for an acknowledge at the peripheral’s documented seven-bit address at 100 kHz.
  • Check that rise time from 30% to 70% of the rail is at most 1 µs. With 4.7 kΩ and 100 pF the estimated rise time is about 0.40 µs.

ST DS8597 Rev 9, Tables 7 and 9; NXP UM10204 Rev 7, standard-mode timing and pull-up selection.

1Bitsy v1.0d wiring map

Highlighted contacts are used in the required step or selected circuit. Select a contact to inspect it.

Component side · USB connector at the top
Lower expansion holes · inner row
Left to right, component side. Between VBAT and PB0.
Lower expansion holes · outer row
Left to right, component side. Between 3V3 and GND.
X3 Cortex debug header · upper row
Left to right, component side, with USB above X3.
X3 Cortex debug header · lower row
Left to right, component side.
P24 Micro-USB B
Connector pin order. Use a Micro-B data cable.
Auxiliary GPIO and switch
Contact identifiers. See the component-side drawing for locations.
Rear USB pads
Left to right, solder side, with USB at the top.
Rear debug pads
PCB pad identifiers. See the solder-side drawing for locations.
Rear boot jumper and RTC footprint
PCB pad identifiers. See the solder-side drawing for locations.
Selected pin details

9 · PB7

Bidirectional · GPIO

I²C1 SDA (AF4) or USART1 RX (AF7).

1Bitsy v1.0d pinout legend, p. 1; ST DS8597 Rev 9, Tables 7 and 9

Electrical limits · Pin in the reference

Models and documents

Board revision v1.0d with STM32F415RGT6. Numbered contacts use the official board legend. IDs beginning with P, X, J or SW refer to PCB designators. The hardware archive also documents revisions v1.0a, v1.0b and v1.0c. Confirm the revision on the back before using this map.

1Bitsy v1.0d
STM32F415RGT6 · 1 MiB Flash · 192 KiB SRAM including 64 KiB CCM · 4 KiB backup SRAM.