74HC245 connection guide
Set up a one-bit test and use a high-impedance interval to hand the bus to the other driver.
Power the IC with its outputs disabled
With power off, wire a regulated 4.5 V rail to pin 20 VCC and the common return to pin 10 GND. Place one 100 nF ceramic capacitor (16 V or higher) close to the IC across those pins. Share the return with the controller and both endpoints. Use rail-compatible controls and endpoints on this same supply.
Pull /OE (pin 19) up to VCC with 10 kΩ so it defaults HIGH while the powered controller output is high impedance. Use a push-pull control with fast edges for switching. The pull-up adds about 0.45 mA at LOW on this rail. Hold DIR at a defined level through startup, using a 10 kΩ pull-down if the DIR controller starts in high impedance. Keep external signals within the rails, including during power sequencing.
Wire and bias the data pins
Connect endpoint A to A0 (pin 2) and endpoint B to B0 (pin 18). Use endpoints that can switch between driving and a high-impedance input. The controller or bus protocol must coordinate both endpoint drivers and the 74HC245 controls. Connect the controller outputs to DIR (pin 1) and /OE (pin 19). Power up with both endpoints in receive mode and /OE HIGH.
Fit one 10 kΩ pull-down per data pin, A0–A7 (2–9) and B0–B7 (11–18), including the two connected to the endpoints. Each resistor loads a HIGH by about 0.45 mA at 4.5 V. The resistors define LOW when the drivers release, including during handoff. Sample only during a valid transfer and verify total loading and leakage with the endpoints attached.
Test the signal path
A → B
Start with /OE HIGH. Configure B as an input, set DIR HIGH and establish valid data at A0. Then drive /OE LOW.
/OE LOW · DIR HIGH
| State | Endpoint A | Endpoint B |
|---|---|---|
| A → B | Drive | Receive |
Read the arrow from A0 (2) to B0 (18). Drive 0 V and then 4.5 V at the source. With total output load ≤ 6 mA, including the pull-down and endpoint, expect ≤ 0.40 V and then ≥ 3.70 V, respectively. Measure relative to pin 10 with a high-impedance meter.
Arrows show signal direction between paired pins.
The map highlights the test bit and its controls. DIR and /OE apply to all eight bits.
Complete A → B to B → A handoff
| Phase | /OE | DIR | End A | End B |
|---|---|---|---|---|
| A drives | LOW | HIGH | Drive | Receive |
| Release both | HIGH | HIGH | Receive | Receive |
| Change DIR | HIGH | LOW | Receive | Receive |
| Prepare B | HIGH | LOW | Receive | Drive |
| B drives | LOW | LOW | Receive | Drive |
- Begin with endpoint A driving valid data and endpoint B configured as an input.
- Drive /OE HIGH and wait for the 74HC245 output to release. Then put endpoint A in receive mode and wait for its output to release. Endpoint B stays in receive mode.
- With both endpoint drivers off and /OE still HIGH, drive DIR LOW and let it settle at the IC pin.
- Keep /OE HIGH and endpoint A in receive mode. Enable endpoint B’s driver and wait for valid data at B0.
- Pull /OE LOW only after B0 is valid and A is receiving. Allow enable and data settling time before sampling A0. Swap the port roles for the return handoff.
At 4.5 V, 50 pF and −40 to +125 °C, the 74HC245 output enable and disable delays are each 45 ns maximum under the datasheet test conditions. Budget from the control signal reaching the pin. Include worst-case release and enable times of the external endpoints, board loading, DIR and data settling, and margin. Confirm the timing and direction at the pins with a scope before using the sequence at speed.
Source for logic and timing: datasheet §6 Table 3, §9 Table 6 and §10 Table 7 and Fig. 4.
Package and documents
74HC245D · Nexperia SOT163-1 · 12.8 × 7.5 mm body · 1.27 mm terminal pitch. Production order code 74HC245D,653.Catalog also lists 74HC245D,652 (withdrawn).
Scope: Nexperia’s commercial 74HC245 packages in Rev. 9. The legacy N (PDIP20) and DB (SSOP20) were removed in earlier revisions. The shared datasheet also describes 74HCT245, which has different input thresholds and operating supply limits. The automotive 74HC245-Q100 series has its own datasheet.
- Nexperia 74HC245 datasheet (PDF)· 74HC_HCT245 Rev. 9 · 9 May 2025
- SOT163-1 package drawing (PDF)
- 74HC245D product and order codes
- Nexperia series and ordering status
Pin assignments and exposed pad: §5, p. 3. Package versions: §3 Table 1. Outline: §11 Fig. 6.