Spark Logic

APW8805 / APW8805A / APW8805B buck converter pinout

The APW8805 family integrates the switches for a 3 A synchronous step-down regulator. All three versions share the same TDFN pin map.

TDFN 3 × 3 mm (QB)

11 contacts Current package

ANPEC Electronics · Ten perimeter leads and one exposed ground pad.

TDFN 3 × 3 mm (QB) pinout

TDFN 3 × 3 mm (QB) · Top view, with pin 1 at upper left. The exposed ground pad is on the underside.
Dashed outline shows the underside pad schematically. See the package drawing for the footprint.
Selected pin details

1 · FB

Input · Inputs

Divider midpoint. Sense the filtered output here; the nominal regulated feedback voltage is 0.8 V.

ANPEC APW8805 / A / B datasheets, p. 2 and Pin Description

Electrical limits · Link to this pin

Build the 1.05 V buck circuit

Build the 1.05 V buck circuitVIN22µ100kENPOKVINVCCAPW8805SW1.5µHVOUT4.7kFB15k2×22µGND / EPGND
  • Input
    • CIN.1
    • RPG.1
    • Input supply positive
  • Ground
    • CIN.2
    • COUT1.2
    • COUT2.2
    • R2.2
    • Input return
  • Enable
    • →
    • Enable control
  • Switch node
    • →
    • →
    • L1.1
  • Output
    • L1.2
    • R1.1
    • COUT1.1
    • COUT2.1
    • Load positive
  • Feedback
    • →
    • R1.2
    • R2.1
  • Power good
    • →
    • RPG.2
    • Power-good monitor

Connection guide

All 11 pins

PinSignalDirectionFunction
1FB InputInput Divider midpoint. Sense the filtered output here; the nominal regulated feedback voltage is 0.8 V.
2VCC SupplySupply Control supply. Connect to the input rail in the single-supply circuit.
3VIN SupplySupply Power-stage input. Place the input ceramic capacitor close to VIN and ground.
4GND ReturnReturn Ground; connect to pin 5 and the exposed pad.
5GND ReturnReturn Ground; connect to pin 4 and the exposed pad.
6SW OutputOutput Switch node, tied to pin 7 and the inductor input.
7SW OutputOutput Switch node, tied to pin 6 and the inductor input.
8NC No connectionNo connection Leave unconnected.
9POK OutputOutput Open-drain status output. Add a pull-up; check the receiver voltage rating.
10EN InputInput Active-high enable. Drive to a defined logic level; see model-specific thresholds.
11GND Thermal padThermal pad Exposed thermal pad. Solder to board ground along with pins 4 and 5.

Signal assignments

Electrical limits

ParameterLimitConditions and source
VCC and VIN tied2.6–6 V2.6–6 V Single-supply application. Separate VIN may operate down to 2 V while VCC still needs at least 2.6 V. ANPEC APW8805 / A / B, Recommended Operating Conditions
Feedback0.8 V nominal0.8 V nominal Use the electrical table and divider equation for the exact variant. ANPEC APW8805 / A / B, Electrical Characteristics
PWM oscillator0.85–1.15 MHz0.85–1.15 MHz 1 MHz typical; automatic variants can enter PFM at light load. ANPEC APW8805 / A / B, Electrical Characteristics
Output current3 A rated3 A rated Check inductor current, PCB dissipation and voltage headroom in the intended circuit. ANPEC APW8805 / A / B, Typical Application Circuit

Models and documents

Choose the exact suffix for the enable thresholds and light-load behavior. The APW8805B overview lists 0.6 V as a minimum output, while its feedback specification and application equation use 0.8 V. The circuit here uses the documented 0.8 V reference.

APW8805
Automatic PFM/PWM. Order code: APW8805QBI-TRG.
APW8805A
Forced PWM. Order code: APW8805AQBI-TRG.
APW8805B
Automatic PFM/PWM; documented startup into a pre-biased output. Order code: APW8805BQBI-TRG.