Serial Wire Debug
Use SWCLK and SWDIO for debug. SWO is optional trace output. SWCLK → PB28 · SWDIO → PB31 · SWO → PB30
84 MHz Arm Cortex-M3 microcontroller with 512 KiB flash, USB OTG, Ethernet MAC, CAN and analog peripherals.
Selects boundary scan when high. Use the documented low strap for normal debugger access.
| Pin | Signal | Direction | Function |
|---|---|---|---|
| 1 | PB26 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CTS0 Peripheral B · TCLK0 Extra function · WKUP15 |
| 2 | PA9 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · UTXD Peripheral B · PWMH3 |
| 3 | PA10 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RXD0 Peripheral B · DATRG Extra function · WKUP5 |
| 4 | PA11 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TXD0 Peripheral B · ADTRG Extra function · WKUP6 |
| 5 | PA12 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RXD1 Peripheral B · PWML1 Extra function · WKUP7 |
| 6 | PA13 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TXD1 Peripheral B · PWMH2 |
| 7 | PA14 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RTS1 Peripheral B · TK |
| 8 | PA15 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CTS1 Peripheral B · TF Extra function · WKUP8 |
| 9 | PA17 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TWD0 Peripheral B · SPCK0 |
| 10 | VDDCORE Supply | Supply | 1.8 V supply for the core and embedded logic. Connect all core supply contacts. |
| 11 | VDDIO Supply | Supply | Digital I/O supply. Connect each VDDIO contact and place a local ceramic bypass capacitor nearby. |
| 12 | GND Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 13 | PD0 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A10 Peripheral B · MCDA4 |
| 14 | PD1 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A11 Peripheral B · MCDA5 |
| 15 | PD2 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A12 Peripheral B · MCDA6 |
| 16 | PD3 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A13 Peripheral B · MCDA7 |
| 17 | PD4 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A14 Peripheral B · TXD3 |
| 18 | PD5 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A15 Peripheral B · RXD3 |
| 19 | PD6 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A16/BA0 Peripheral B · PWMFI2 |
| 20 | PD7 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A17/BA1 Peripheral B · TIOA8 |
| 21 | PD8 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A21/NANDALE Peripheral B · TIOB8 |
| 22 | PD9 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A22/NANDCLE Peripheral B · TCLK8 |
| 23 | PA0 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CANTX0 Peripheral B · PWML3 |
| 24 | PA1 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CANRX0 Peripheral B · PCK0 Extra function · WKUP0 |
| 25 | PA5 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TIOA2 Peripheral B · PWMFI0 Extra function · WKUP2 |
| 26 | PA7 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TCLK2 Peripheral B · NCS1 Extra function · WKUP3 |
| 27 | PA8 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · URXD Peripheral B · PWMH0 Extra function · WKUP4 |
| 28 | PB28 Bidirectional | Bidirectional | System debug pin at reset. Check the system-I/O setting before using it as GPIO. Peripheral A · TCK/SWCLK |
| 29 | PB29 Bidirectional | Bidirectional | System debug pin at reset. Check the system-I/O setting before using it as GPIO. Peripheral A · TDI |
| 30 | PB30 Bidirectional | Bidirectional | System debug pin at reset. Check the system-I/O setting before using it as GPIO. Peripheral A · TDO/TRACESWO |
| 31 | PB31 Bidirectional | Bidirectional | System debug pin at reset. Check the system-I/O setting before using it as GPIO. Peripheral A · TMS/SWDIO |
| 32 | PD10 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · NWR1/NBS1 |
| 33 | GNDPLL Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 34 | VDDPLL Supply | Supply | 1.8 V supply for the main oscillator and PLL. Follow the device-specific decoupling and filtering circuit. |
| 35 | XOUT Output | Output | Main oscillator amplifier output. Use the load network for the chosen crystal. |
| 36 | XIN Input | Input | Main oscillator amplifier input. Use the recommended crystal or external clock circuit. |
| 37 | DHSDP Bidirectional | Bidirectional | USB high-speed positive data signal. Follow the combined high-speed and full-speed data-line schematic. |
| 38 | DHSDM Bidirectional | Bidirectional | USB high-speed negative data signal. Follow the combined high-speed and full-speed data-line schematic. |
| 39 | VBUS Input | Input | USB bus sense. Follow the bus-powered or self-powered USB circuit in the checklist. |
| 40 | VBG Reference | Reference | USB PHY bias reference. Use the specified 6.8 kΩ and 10 pF network. |
| 41 | VDDUTMI Supply | Supply | USB PHY supply. Use 3.3 V nominal for USB and follow the separate filter shown in the hardware checklist. |
| 42 | DFSDP Bidirectional | Bidirectional | USB full-speed positive data signal. Follow the series termination schematic. |
| 43 | DFSDM Bidirectional | Bidirectional | USB full-speed negative data signal. Follow the series termination schematic. |
| 44 | GNDUTMI Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 45 | VDDCORE Supply | Supply | 1.8 V supply for the core and embedded logic. Connect all core supply contacts. |
| 46 | JTAGSEL Input | Input | Selects boundary scan when high. Use the documented low strap for normal debugger access. |
| 47 | NRSTB Input | Input | Active-low asynchronous reset, including the backup region. This pin has an internal pull-up to VDDBU. |
| 48 | XIN32 Input | Input | 32.768 kHz oscillator input. See the slow-clock design guidance before using an external crystal. |
| 49 | XOUT32 Output | Output | 32.768 kHz oscillator output. See the slow-clock design guidance. |
| 50 | SHDN Output | Output | Shutdown control output. Use it to control external power when implementing backup mode. |
| 51 | TST Input | Input | Factory test and fast programming selection. Use the documented low strap for normal operation. |
| 52 | VDDBU Supply | Supply | Backup and slow-clock supply. Respect its relationship with VDDIO and the backup-domain controls. |
| 53 | FWUP Input | Input | Backup-domain force wake-up input. Check the bias and polarity for the selected wake-up mode. |
| 54 | GNDBU Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 55 | PC1 Bidirectional | Bidirectional | Programmable input/output line. |
| 56 | VDDOUT Regulator output | Regulator output | Output of the on-chip 1.8 V regulator. Use the specified output capacitor for regulator stability. |
| 57 | VDDIN Supply | Supply | Input to the on-chip regulator. On SAM7X it also supplies the ADC. |
| 58 | GND Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 59 | PC2 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D0 Peripheral B · PWML0 |
| 60 | PC3 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D1 Peripheral B · PWMH0 |
| 61 | VDDCORE Supply | Supply | 1.8 V supply for the core and embedded logic. Connect all core supply contacts. |
| 62 | VDDIO Supply | Supply | Digital I/O supply. Connect each VDDIO contact and place a local ceramic bypass capacitor nearby. |
| 63 | PC5 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D3 Peripheral B · PWMH1 |
| 64 | PC6 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D4 Peripheral B · PWML2 |
| 65 | PC7 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D5 Peripheral B · PWMH2 |
| 66 | PC8 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D6 Peripheral B · PWML3 |
| 67 | PC9 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D7 Peripheral B · PWMH3 |
| 68 | PB27 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · NCS3 Peripheral B · TIOB0 |
| 69 | NRST Bidirectional | Bidirectional | Active-low system reset controlled by the reset controller. Use open-drain drive for external reset. |
| 70 | PA18 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TWCK0 Peripheral B · A20 Extra function · WKUP9 |
| 71 | PA19 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · MCCK Peripheral B · PWMH1 |
| 72 | PA20 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · MCCDA Peripheral B · PWML2 |
| 73 | VDDANA Supply | Supply | Analog supply for the ADC and DAC. Follow the supply and reference limits for the intended resolution. |
| 74 | GNDANA Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 75 | ADVREF Analog reference | Analog reference | Reference voltage input for the analog converter. Follow the reference limits and connection for the selected use. |
| 76 | PB15 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CANRX1 Peripheral B · PWMH3 Extra function · DAC0/WKUP12 |
| 77 | PB16 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TCLK5 Peripheral B · PWML0 Extra function · DAC1 |
| 78 | PA16 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SPCK1 Peripheral B · TD Extra function · AD7 |
| 79 | PA24 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · MCDA3 Peripheral B · PCK1 Extra function · AD6 |
| 80 | PA23 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · MCDA2 Peripheral B · TCLK4 Extra function · AD5 |
| 81 | PA22 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · MCDA1 Peripheral B · TCLK3 Extra function · AD4 |
| 82 | PA6 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TIOB2 Peripheral B · NCS0 Extra function · AD3 |
| 83 | PA4 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TCLK1 Peripheral B · NWAIT Extra function · AD2 |
| 84 | PA3 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TIOB1 Peripheral B · PWMFI1 Extra function · AD1/WKUP1 |
| 85 | PA2 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TIOA1 Peripheral B · NANDRDY Extra function · AD0 |
| 86 | PB12 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TWD1 Peripheral B · PWMH0 Extra function · AD8 |
| 87 | PB13 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TWCK1 Peripheral B · PWMH1 Extra function · AD9 |
| 88 | PB17 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RF Peripheral B · PWML1 Extra function · AD10 |
| 89 | PB18 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RD Peripheral B · PWML2 Extra function · AD11 |
| 90 | PB19 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RK Peripheral B · PWML3 Extra function · AD12 |
| 91 | PB20 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · TXD2 Peripheral B · SPI0_NPCS1 Extra function · AD13 |
| 92 | PB21 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RXD2 Peripheral B · SPI0_NPCS2 Extra function · AD14/WKUP13 |
| 93 | PC11 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D9 Peripheral B · ERX2 |
| 94 | PC12 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D10 Peripheral B · ERX3 |
| 95 | PC13 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D11 Peripheral B · ECOL |
| 96 | PC14 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D12 Peripheral B · ERXCK |
| 97 | PC15 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D13 Peripheral B · ETX2 |
| 98 | PC16 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D14 Peripheral B · ETX3 |
| 99 | PC17 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D15 Peripheral B · ETXER |
| 100 | PC18 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · NWR0/NWE Peripheral B · PWMH6 |
| 101 | PC19 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · NANDOE Peripheral B · PWMH5 |
| 102 | PC29 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A8 Peripheral B · TIOB7 |
| 103 | PC30 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A9 Peripheral B · TCLK7 |
| 104 | VDDCORE Supply | Supply | 1.8 V supply for the core and embedded logic. Connect all core supply contacts. |
| 105 | VDDIO Supply | Supply | Digital I/O supply. Connect each VDDIO contact and place a local ceramic bypass capacitor nearby. |
| 106 | GND Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 107 | PA21 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · MCDA0 Peripheral B · PWML0 |
| 108 | PA25 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SPI0_MISO Peripheral B · A18 |
| 109 | PA26 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SPI0_MOSI Peripheral B · A19 |
| 110 | PA27 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SPI0_SPCK Peripheral B · A20 Extra function · WKUP10 |
| 111 | PA28 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SPI0_NPCS0 Peripheral B · PCK2 Extra function · WKUP11 |
| 112 | PA29 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SPI0_NPCS1 Peripheral B · NRD |
| 113 | PB0 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ETXCK/EREFCK |
| 114 | PB1 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ETXEN |
| 115 | PB2 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ETX0 |
| 116 | PC4 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D2 Peripheral B · PWML1 |
| 117 | PC10 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · D8 Peripheral B · ECRS |
| 118 | PB3 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ETX1 |
| 119 | PB4 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ECRSDV/ERXDV |
| 120 | PB5 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ERX0 |
| 121 | PB6 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ERX1 |
| 122 | PB7 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · ERXER |
| 123 | PB8 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · EMDC |
| 124 | VDDCORE Supply | Supply | 1.8 V supply for the core and embedded logic. Connect all core supply contacts. |
| 125 | VDDIO Supply | Supply | Digital I/O supply. Connect each VDDIO contact and place a local ceramic bypass capacitor nearby. |
| 126 | GND Return | Return | Connect to the ground plane with local return paths for the associated supply capacitors. |
| 127 | PB9 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · EMDIO |
| 128 | PB10 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · UOTGVBOF Peripheral B · A18 |
| 129 | PB11 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · UOTGID Peripheral B · A19 |
| 130 | PC0 Bidirectional | Bidirectional | Programmable input/output line. Extra function · ERASE |
| 131 | PC20 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · NANDWE Peripheral B · PWMH4 |
| 132 | PC21 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A0/NBS0 Peripheral B · PWML4 |
| 133 | PC22 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A1 Peripheral B · PWML5 |
| 134 | PC23 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A2 Peripheral B · PWML6 |
| 135 | PC24 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A3 Peripheral B · PWML7 |
| 136 | PC25 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A4 Peripheral B · TIOA6 |
| 137 | PC26 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A5 Peripheral B · TIOB6 |
| 138 | PC27 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A6 Peripheral B · TCLK6 |
| 139 | PC28 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · A7 Peripheral B · TIOA7 |
| 140 | PB14 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CANTX1 Peripheral B · PWMH2 |
| 141 | PB22 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RTS2 Peripheral B · PCK0 |
| 142 | PB23 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · CTS2 Peripheral B · SPI0_NPCS3 Extra function · WKUP14 |
| 143 | PB24 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · SCK2 Peripheral B · NCS2 |
| 144 | PB25 Bidirectional | Bidirectional | Programmable input/output line. Peripheral A · RTS0 Peripheral B · TIOA0 |
Use SWCLK and SWDIO for debug. SWO is optional trace output. SWCLK → PB28 · SWDIO → PB31 · SWO → PB30
The system-I/O debug pads are selected at reset. JTAGSEL low enables normal debugger access. TCK → PB28 · TDI → PB29 · TDO → PB30 · TMS → PB31
PIOA peripheral A. Cross TX and RX at the adapter. URXD → PA8 · UTXD → PA9
Check the PIO A/B or extra-function selection for each pad. RXD0 → PA10 · TXD0 → PA11 · RXD1 → PA12 · TXD1 → PA13 · RTS1 → PA14 · CTS1 → PA15 · TXD2 → PB20 · RXD2 → PB21 · RTS2 → PB22 · CTS2 → PB23 · SCK2 → PB24 · RTS0 → PB25 · CTS0 → PB26 · TXD3 → PD4 · RXD3 → PD5
Check the PIO A/B or extra-function selection for each pad. TWD0 → PA17 · TWCK0 → PA18 · TWD1 → PB12 · TWCK1 → PB13
Check the PIO A/B or extra-function selection for each pad. SPCK1 → PA16 · SPCK0 → PA17 · SPI0_MISO → PA25 · SPI0_MOSI → PA26 · SPI0_SPCK → PA27 · SPI0_NPCS0 → PA28 · SPI0_NPCS1 → PA29 · SPI0_NPCS1 → PB20 · SPI0_NPCS2 → PB21 · SPI0_NPCS3 → PB23
Check the PIO A/B or extra-function selection for each pad. CANTX0 → PA0 · CANRX0 → PA1 · CANTX1 → PB14 · CANRX1 → PB15
Check the PIO A/B or extra-function selection for each pad. ETXCK/EREFCK → PB0 · ETXEN → PB1 · ETX0 → PB2 · ETX1 → PB3 · ECRSDV/ERXDV → PB4 · ERX0 → PB5 · ERX1 → PB6 · ERXER → PB7 · EMDC → PB8 · EMDIO → PB9 · ECRS → PC10 · ERX2 → PC11 · ERX3 → PC12 · ECOL → PC13 · ERXCK → PC14 · ETX2 → PC15 · ETX3 → PC16 · ETXER → PC17
Check the PIO A/B or extra-function selection for each pad. AD0 → PA2 · AD1 → PA3 · AD2 → PA4 · AD3 → PA6 · AD7 → PA16 · AD4 → PA22 · AD5 → PA23 · AD6 → PA24 · AD8 → PB12 · AD9 → PB13 · DAC0 → PB15 · DAC1 → PB16 · AD10 → PB17 · AD11 → PB18 · AD12 → PB19 · AD13 → PB20 · AD14 → PB21
Check the PIO A/B or extra-function selection for each pad. MCCK → PA19 · MCCDA → PA20 · MCDA0 → PA21 · MCDA1 → PA22 · MCDA2 → PA23 · MCDA3 → PA24 · MCDA4 → PD0 · MCDA5 → PD1 · MCDA6 → PD2 · MCDA7 → PD3
Check the PIO A/B or extra-function selection for each pad. PWML3 → PA0 · PWMFI1 → PA3 · PWMFI0 → PA5 · PWMH0 → PA8 · PWMH3 → PA9 · PWML1 → PA12 · PWMH2 → PA13 · PWMH1 → PA19 · PWML2 → PA20 · PWML0 → PA21 · PWMH0 → PB12 · PWMH1 → PB13 · PWMH2 → PB14 · PWMH3 → PB15 · PWML0 → PB16 · PWML1 → PB17 · PWML2 → PB18 · PWML3 → PB19 · PWML0 → PC2 · PWMH0 → PC3 · PWML1 → PC4 · PWMH1 → PC5 · PWML2 → PC6 · PWMH2 → PC7 · PWML3 → PC8 · PWMH3 → PC9 · PWMH6 → PC18 · PWMH5 → PC19 · PWMH4 → PC20 · PWML4 → PC21 · PWML5 → PC22 · PWML6 → PC23 · PWML7 → PC24 · PWMFI2 → PD6
Follow the manufacturer’s routing, series termination and VBUS topology for the selected USB mode. HS D+ → DHSDP · HS D− → DHSDM · FS D+ → DFSDP · FS D− → DFSDM · VBUS control → PB10 · USB ID → PB11 · VBUS sense → VBUS · Bias reference → VBG
| Parameter | Limit | Conditions and source |
|---|---|---|
| VDDIO1.62–3.6 V | 1.62–3.6 V | Use the specified startup timing and rail relationship with VDDIN. 11057C §§5.1–5.2 |
| VDDCORE and VDDPLL1.62–1.95 V | 1.62–1.95 V | Nominal 1.8 V. Use the specified output capacitance if fed from VDDOUT. 11057C §5.1, AT03462 §2.1 |
| USB PHY supply3.0–3.6 V | 3.0–3.6 V | Nominal 3.3 V. Follow the filtered-rail layout and ripple specification. 11057C §5.1, AT03462 §2.1 |
| Flash and SRAM512 KiB · 96 KiB + 4 KiB NFC | 512 KiB · 96 KiB + 4 KiB NFC | Flash is organized in two 256 KiB banks. The 4 KiB NFC bank is additional to the 64 KiB and 32 KiB system banks. 11057C configuration summary |
| Maximum CPU clock84 MHz | 84 MHz | Follow the clock source, flash wait states and applicable silicon errata. 11057C Electrical Characteristics |
Includes the 144-lead LQFP and 144-ball LFBGA order codes in 11057C §48. The package power pins differ. GPIO peripheral choices use the SAM3X rows in the PIO tables.