Black Magic Probe Mini pinout

The Black Magic Probe Mini V2.1e connects GDB to a target over SWD or JTAG. Its Cortex debug connector uses the target’s I/O rail to reference the probe’s level shifters.

Mini V2.1e debug header

10 contacts Current package

1BitSquared · 10 positions · 1.27 mm pitch · Cortex debug connector

Mini V2.1e debug header pinout

Connector contact view. Match the keyed position and pin 1 to the probe’s marking.

Selected pin details

2 · SWDIO / TMS

Bidirectional in SWD · Debug

Serial Wire Debug data. In JTAG, this is the target’s mode-select input.

Black Magic Probe Mini V2.1e schematic, JTAG-10 block

Electrical limits · Link to this pin

All 10 pins

Pin	Signal	Direction	Function
1	VTref Target reference	Target reference	Connect to the powered target’s I/O rail. It sets the voltage reference for the probe’s level shifters.
2	SWDIO / TMS Bidirectional in SWD	Bidirectional in SWD	Serial Wire Debug data. In JTAG, this is the target’s mode-select input.
3	GND Return	Return	Connect to target ground.
4	SWCLK / TCK Probe output	Probe output	Clock driven by the probe in both SWD and JTAG.
5	GND Return	Return	Connect to target ground.
6	SWO / TDO Probe input	Probe input	Optional Serial Wire Output trace input. In JTAG, this is the target data output.
7	KEY Key position	Key position	Mechanical key position in a keyed connector. Leave unused.
8	TDI Probe output	Probe output	JTAG test data input at the target. Leave unused for basic SWD.
9	GND Return	Return	Connect to target ground on this probe revision.
10	nRESET Open-drain probe output	Open-drain probe output	Active-low target reset. Connect when reset control is needed.

Signal assignments

SWD

The target provides reference voltage. The data and clock lines are sufficient for standard SWD when the target is running. Reset can help attach to a target during startup.

JTAG

Wire the four JTAG signals and the voltage reference according to the target schematic. The debug header does not expose a separate nTRST.

Electrical limits

Parameter	Limit	Conditions and source
Buffered target debug voltage1.8–5 V	1.8–5 V	Applies to the V2.1 hardware’s buffered debug lines. Use the target’s actual I/O voltage for VTref. Black Magic Debug, Supported Hardware, BMP Mini V2.1
Target supply in the guideExternal to the probe	External to the probe	Leave probe-supplied target power disabled when using an independently powered target. Black Magic Debug, Getting Started, target wiring and GDB connection

Models and documents

This map covers the target debug header of BMP Mini V2.1e. Check the official hardware pages for the auxiliary serial connector, older 20-contact probes and the V2.3 unified connector.

BMP Mini V2.1e: Official 1BitSquared V2.1e hardware.

BMP Mini V2.1e schematic· 1BitSquared schematic. Debug connector and level shifting.
Black Magic Debug hardware revisions· Target voltage, interfaces and revision notes.
Black Magic Debug setup· USB enumeration, GDB transport and target scan.