Spark Logic

CH340G USB-to-UART bridge pinout

The CH340G bridges USB Full Speed to an asynchronous logic-level UART. Its XI and XO leads need a 12 MHz crystal circuit.

SOP-16

16 contacts Current package

WCH · 3.9 mm body width · 1.27 mm lead pitch

SOP-16 pinout

Top view. Match pin 1 to the package mark. The numbers advance counterclockwise.
Selected pin details

15 · R232

Input · Control

Optional receive-polarity control. Leave open for the normal UART circuit.

WCH CH340DS1, version 3B, §§3–5

Electrical limits · Link to this pin

All 16 pins

PinSignalDirectionFunction
1GND ReturnReturn Connect to the circuit ground plane.
2TXD OutputOutput Asynchronous transmit. Connect to the receiver of the external logic-level UART.
3RXD InputInput Asynchronous receive. Connect to the transmitter of the external logic-level UART.
4V3 Regulator terminalRegulator terminal At 5 V VCC, bypass this node to ground with 100 nF. With a regulated 3.3 V supply, connect V3 and VCC together.
5UD+ BidirectionalBidirectional USB D+ line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit.
6UD− BidirectionalBidirectional USB D− line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit.
7XI InputInput Input of the 12 MHz crystal oscillator. Keep the crystal network close to the part.
8XO OutputOutput Output of the 12 MHz crystal oscillator.
9CTS# InputInput Clear to Send, active low.
10DSR# InputInput Data Set Ready, active low.
11RI# InputInput Ring Indicator, active low.
12DCD# InputInput Data Carrier Detect, active low.
13DTR# OutputOutput Data Terminal Ready, active low.
14RTS# OutputOutput Request to Send, active low.
15R232 InputInput Optional receive-polarity control. Leave open for the normal UART circuit.
16VCC Supply inputSupply input Main supply input. Connect to the specified operating rail and decouple locally.

Signal assignments

USB data pair

Keep the D+ and D− polarity consistent at the connector and the bridge. Use the package-specific application circuit for matching and bypass components.

Asynchronous UART

Use the receive and transmit pair with a common ground. The signals use logic-level voltages. A separate transceiver is needed for bipolar RS-232.

Electrical limits

ParameterLimitConditions and source
5 V supply mode5 V nominal5 V nominal VCC takes the supply. Bypass V3 to ground with 100 nF. WCH CH340DS1, version 3B, §5.1
3.3 V supply mode3.3 V nominal3.3 V nominal Tie V3 to VCC and keep the connected circuits at or below 3.3 V. WCH CH340DS1, version 3B, §5.1
External oscillator12 MHz12 MHz The example uses 33 pF load capacitors. Select the actual values to suit the crystal and PCB parasitics. WCH CH340DS1, version 3B, §7.2
UART data rate50 bit/s to 2 Mbit/s50 bit/s to 2 Mbit/s Use a rate supported by the driver and both ends of the UART. WCH CH340DS1, version 3B, §2

Models and documents

The interactive map covers the CH340G SOP-16. See CH340DS1 §3 for CH340C, CH340B and the smaller CH340 packages. Some variants use an internal clock and assign pins 7 and 8 differently.

CH340G
3.9 mm body width · 1.27 mm lead pitch