Spark Logic

FT232RL USB-to-UART bridge pinout

FT232RL is the SSOP-28 version of the FT232R bridge. It integrates the USB transceiver, internal clock and EEPROM and has a separate VCCIO supply.

SSOP-28

28 contacts Current package

FTDI · 5.3 mm nominal body width · 0.65 mm lead pitch

SSOP-28 pinout

Top view. Match pin 1 to the package mark. The numbers advance counterclockwise.
Selected pin details

27 · OSCI

Input · Clock inputs / oscillator

External 12 MHz oscillator input. Leave open when using the internal oscillator.

FTDI FT_000053, version 2.12, §3.2

Electrical limits · Link to this pin

All 28 pins

PinSignalDirectionFunction
1TXD OutputOutput Asynchronous transmit. Connect to the receiver of the external logic-level UART.
2DTR# OutputOutput Data Terminal Ready, active low.
3RTS# OutputOutput Request to Send, active low.
4VCCIO Supply inputSupply input Sets the UART and configurable pin logic levels.
5RXD InputInput Asynchronous receive. Connect to the transmitter of the external logic-level UART.
6RI# InputInput Ring Indicator, active low.
7GND ReturnReturn Connect to the circuit ground plane.
8NC UnconnectedUnconnected Leave open for this circuit.
9DSR# InputInput Data Set Ready, active low.
10DCD# InputInput Data Carrier Detect, active low.
11CTS# InputInput Clear to Send, active low.
12CBUS4 Configurable outputConfigurable output EEPROM-configurable output. The factory function is SLEEP#.
13CBUS2 ConfigurableConfigurable The internal EEPROM selects the function. See the CBUS options table for available configurations.
14CBUS3 ConfigurableConfigurable The internal EEPROM selects the function. See the CBUS options table for available configurations.
15USBDP BidirectionalBidirectional USB D+ line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit.
16USBDM BidirectionalBidirectional USB D− line. Route with the other data line as a differential pair and use the manufacturer’s reference circuit.
173V3OUT Regulator outputRegulator output Nominal 3.3 V regulator output. Bypass to ground with 100 nF.
18GND ReturnReturn Connect to the circuit ground plane.
19RESET# InputInput Active-low reset. The internal power-on reset handles a normal bus-powered start.
20VCC Supply inputSupply input Main supply input. Connect to the specified operating rail and decouple locally.
21GND ReturnReturn Connect to the circuit ground plane.
22CBUS1 ConfigurableConfigurable The internal EEPROM selects the function. See the CBUS options table for available configurations.
23CBUS0 ConfigurableConfigurable The internal EEPROM selects the function. See the CBUS options table for available configurations.
24NC UnconnectedUnconnected Leave open for this circuit.
25AGND ReturnReturn Connect to the ground plane with the other return leads.
26TEST InputInput Tie to ground for normal operation.
27OSCI InputInput External 12 MHz oscillator input. Leave open when using the internal oscillator.
28OSCO OutputOutput External 12 MHz oscillator output. Leave open when using the internal oscillator.

Signal assignments

USB data pair

Keep the D+ and D− polarity consistent at the connector and the bridge. Use the package-specific application circuit for matching and bypass components.

Asynchronous UART

Use the receive and transmit pair with a common ground. The signals use logic-level voltages. A separate transceiver is needed for bipolar RS-232.

Electrical limits

ParameterLimitConditions and source
VCC with internal oscillator4.0–5.25 V4.0–5.25 V Use the 5 V VBUS circuit. Refer to §7.6 for operation with an external oscillator and a lower supply. FTDI FT_000053, version 2.12, §3.2 note 1
VCCIO1.8–5.25 V1.8–5.25 V Set this rail to suit the connected UART logic. The guide uses the internal 3.3 V output. FTDI FT_000053, version 2.12, Table 3.2

Models and documents

The interactive map covers FT232RL in SSOP-28. FT232RQ in QFN-32 has different pin numbers. Use the FT232R datasheet §3.3 for that package.

FT232RL
5.3 mm nominal body width · 0.65 mm lead pitch