Software QSPI for stm32f103

Many people use stm32f103xxx. But it does not have a QSPI peripheral module. After reading the documentation for memory (w25qxxx), we tried to write functions that allow you to read information from it using this protocol. And that’s what happened. If someone is interested in me to put the source, write. Disadvantages include the inability to use DMA and memory extension stm32 and use as a shared space.
https://youtu.be/YQSgpBKaEFI

i’d think QSPI is still useful for SPI flash devices using QSPI

it seemed stm32 do have QSPI hardware support, but only for specific devices
http://www.st.com/content/ccc/resource/ … 227538.pdf

even without dma, 4 bit parallel reads could possibly see pretty high throughput

diger67 wrote:Many people use stm32f103xxx. But it does not have a QSPI peripheral module. After reading the documentation for memory (w25qxxx), we tried to write functions that allow you to read information from it using this protocol. And that’s what happened. If someone is interested in me to put the source, write. Disadvantages include the inability to use DMA and memory extension stm32 and use as a shared space.
https://youtu.be/YQSgpBKaEFI

is there any advantage in using this software quadspi iso just the hardware spi?
normally such memory chips support both normal spi and quad spi, and i assume you’re still way faster using the hardware spi vs the software quadspi.
or is this a chip that only has quadspi?

racemaniac wrote:is there any advantage in using this software quadspi iso just the hardware spi?
normally such memory chips support both normal spi and quad spi, and i assume you’re still way faster using the hardware spi vs the software quadspi.
or is this a chip that only has quadspi?

diger67 wrote:racemaniac wrote:is there any advantage in using this software quadspi iso just the hardware spi?
normally such memory chips support both normal spi and quad spi, and i assume you’re still way faster using the hardware spi vs the software quadspi.
or is this a chip that only has quadspi?

diger67 wrote:racemaniac wrote:is there any advantage in using this software quadspi iso just the hardware spi?
normally such memory chips support both normal spi and quad spi, and i assume you’re still way faster using the hardware spi vs the software quadspi.
or is this a chip that only has quadspi?

Wow !! Sorry. Said stupidity, of course, 18 Mbit / s. But even at this speed the 4-wire software bus will win at the SPI.

victor_pv wrote:
Diger, not sure if it was a typo, but the F103 can do Hardware SPI at up 18Mbit officially in SPI1 to 3, and up to 36Mbit unofficially in SPI1.
Are you referring to a flash memory limitation with the 4Mbits?

diger67 wrote:victor_pv wrote:
Diger, not sure if it was a typo, but the F103 can do Hardware SPI at up 18Mbit officially in SPI1 to 3, and up to 36Mbit unofficially in SPI1.
Are you referring to a flash memory limitation with the 4Mbits?

This idea was born accidentally. I connected memory to stm32f446 by QSPI, it did not work correctly. As I found out on the board, it was incorrect to mark two pins. I did not have any other stm32 with QSPI hardware, I had to write a software one. Measuring the read speed is not difficult. The material you suggested I read, it can turn out something useful.
P.s.
Look at the datasheet for this memory and you will understand what to implement on the proposed algorithm QSPI will be almost impossible.

I checked the dump reading time to 256 bytes. When initializing SysTick in 1 μs, the read time for the program QSPI is 1 ms.

uint8_t idData[3];
uint8_t dataBuff[0x100];
static __IO uint32_t sysTickCounter;
__IO uint32_t uwTick = 0;
float timeend;
uint32_t time;

uint32_t GetSysTick(void)
{
return uwTick;
}

void SysTick_Handler(void)
{
uwTick++;
}

int main(void)
{
SysTick_Config(SystemCoreClock/1000000); //1uS

Gpio_Init();
QSPIInit();
QSPI_Read_ID(READ_ID_CHIP, idData, 3);
time = GetSysTick();
QSPI_data_read(0, 0x00, 6, dataBuff);
timeend = (GetSysTick() - time)/1000 ;

while(1)
{
}
}